Fujitsu Corporation

Seiichi Suzuki

Taiji Ema

Shinichiroh Ikemasu

Kazuo Itabashi

Junichi Mitani

Itsuo Yanagita

Manabu Hayashi

Masaya Katayama

Takayuki Ohba

Shinji Miyagaki

Noriyuki Suzuki

Seigen Ri

Kenichi Kawabata

Tatsushi Hara

Junichi Yayanagi

Osamu Hideshima

Kenji Morishita

Kazuhiro Adachi

Masaya Ohtsuki

In a semiconductor device having a fuse and an etching stopper film covering the fuse, an optical window exposing the etching stopper film and a contact hole exposing a conductor pattern are formed simultaneously. By applying a dry etching process further to the etching stopper film, an insulation film covering the fuse is exposed in the optical window.

Semiconductor device having a fuse and a fabrication method thereof

The semiconductor device comprises a semiconductor substrate,of a first conduction-type, first wells,of a second conduction-type formed in a first region on the primary surface of the semiconductor substrate,, a second well,formed in a second region on the primary surface of the semiconductor substrate,other than the first region, a third well,of the first conduction-type formed in the first well, and high-concentration impurity-doped layers,of the first conduction-type formed in deep portions of the semiconductor substrate spaced from the primary surface of the semiconductor device in device regions. In the semiconductor device having triple wells according to the present invention, the high-concentration impurity-doped layers are formed in deep portions inside of the device regions. Accordingly, in the case where the wells have a low concentration so that the transistors have a low threshold voltage, the deep portions of the wells can independently have a high concentration. As a result, punch-through between the source/drain diffused layer of the transistor formed in the well in the well (double wells), and the well outside of the double wells can be prevented. This structure is also effective to prevent latch-up.

Semiconductor device and method for fabricating semiconductor device

A semiconductor device including a semiconductor substrate 10 of a first conduction-type, first wells 20a, 20b of a second conduction-type formed in a first region on the primary surface of the semiconductor substrate 10, a second well 22a formed in a second region on the primary surface of the semiconductor substrate 10 other than the first region, a third well 22b of the first conduction-type formed in the first well, and high-concentration impurity-doped layers 26 of the first conduction-type formed in deep portions of the semiconductor substrate spaced from the primary surface of the semiconductor device in device regions. In a semiconductor device having triple wells, the high-concentration impurity-doped layers are formed in deep portions inside of the device regions. Accordingly, in the case where the wells have a low concentration so that the transistors have a low threshold voltage, the deep portions of the wells can independently have a high concentration. As a result, punch-through between the source/drain diffused layer of the transistor formed in an inner well of a double well, and the well outside of the double well can be prevented. This structure is also effective to prevent latch-up.

Semiconductor device having triple wells

In the course of a production of a semiconductor device with a multilayer insulating layer, when a contact hole is opened in the multilayer insulating layer, an insulating layer activating a metal selective vapor-growth appears at the side wall of the contact hole. A thin metal (e.g., tungsten) layer is selectively deposited in the contact hole. In another case, another metal layer appears within the contact hole. An insulating film preventing a metal selective vapor-growth is deposited over the whole surface of the side wall of the contact hole, the metal layer and a top surface of the multilayer insulating layer, and is anisotropically etched to leave a portion of the film lying on the side wall only as a side wall insulating film. The contact hole is completely filled with another metal (tungsten) by a selective vapor-growth method, to flatten an exposed surface, and then a conductor (e.g., aluminum) line layer is formed on the metal layer in the contact hole and the multilayer insulating layer, to thereby complete the wiring structure of the semiconductor device.

Method of forming wiring of a semiconductor device

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Kawasaki, Japan

Seiichi Suzuki