Rohm Co., Ltd.

Rohm Gmbh

Seigo Mori

Masatoshi Aketa

Yuki Nakano

Kenji Yamamoto

Minoru Nakagawa

Masaya Ueno

Takui Sakaguchi

A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0, a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench, a source region of the first conductivity type formed in a surface layer portion of the body region, and a drain electrode connected to the second main surface of the semiconductor layer.

Semiconductor device

An SiC semiconductor device includes an SiC semiconductor layer of a first conductivity type having a main surface, a source trench formed in the main surface and having a side wall and a bottom wall, a source electrode embedded in the source trench and having a side wall contact portion in contact with a region of the side wall of the source trench at an opening side of the source trench, a body region of a second conductivity type formed in a region of a surface layer portion of the main surface along the source trench, and a source region of the first conductivity type electrically connected to the side wall contact portion of the source electrode in a surface layer portion of the body region.

SiC semiconductor device

A semiconductor device includes a semiconductor layer of a first conductivity type having a main surface, a diode region of the first conductivity type formed in a surface layer portion of the main surface of the semiconductor layer, a carrier trapping region including crystal defects and formed along a peripheral edge of the diode region in the surface layer portion of the main surface of the semiconductor layer, and an anode electrode formed on the main surface of the semiconductor layer and forming a Schottky junction with the diode region.

Semiconductor device having a carrier trapping region including crystal defects

There is provided a reverse-blocking semiconductor device that has a simple configuration, that is capable of improving a yield in a manufacturing process, and that secures a reverse withstand voltage by using a Schottky junction, and there is provided a method for manufacturing the reverse-blocking semiconductor device. A semiconductor device is provided that includes a first conductivity type semiconductor layer that has a front surface, a rear surface on an opposite side of the front surface, and an end surface, a MIS transistor structure formed at a front-surface portion of the semiconductor layer, a first electrode that forms a Schottky junction with a part of the semiconductor layer in the rear surface of the semiconductor layer, and an electric-field relaxation region that is formed to reach the rear surface from the front surface of the semiconductor layer in a peripheral region surrounding an active region in which the MIS transistor structure is formed and that is either a high-resistance region having higher resistance than the semiconductor layer or a second conductivity type impurity region.

Semiconductor device, and method for manufacturing semicondcutor device

[Object] To provide a semiconductor device which can achieve not only satisfactory switching characteristics in both a small current region and a large current region but also a satisfactory reverse withstand voltage. [Solution Means] A semiconductor device is provided that includes a semiconductor layer having a front surface, a back surface on a side opposite thereto, and an end surface, an MIS transistor structure which is formed on a front surface portion of the semiconductor layer, a first conductivity type portion and a second conductivity type portion which are formed adjacent to each other on the side of the back surface of the semiconductor layer, and a first electrode which is formed on the back surface of the semiconductor layer, which forms a Schottky junction with the first conductivity type portion and which is in ohmic contact with the second conductivity type portion.

A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.

A semiconductor deviceincludes a trench gate structureformed in a surface layer portion of a first principal surface of a semiconductor layer. A source regionand a well regionare formed in a surface layer portion of the first principal surface of the semiconductor layer at a side of the trench gate structure. The well regionis formed in a region at a side of the second principal surface of the semiconductor layer with respect to the source region. A channel is formed along the trench gate structurein a portion of the well region. A multilayer regionis formed in a region between the trench gate structureand the source regionin the semiconductor layer. The multilayer regionhas a p type impurity regionformed in the surface layer portion of the first principal surface of the semiconductor layer and an n type impurity regionformed in a side of the second principal surface of the semiconductor layer with respect to the second conductivity type impurity region

A semiconductor device according to the present invention includes a semiconductor layer of SiC of a first conductivity type, a plurality of body regions of a second conductivity type formed in the surface portion of the semiconductor layer with each body region forming a unit cell, a source region of the first conductivity type formed in the inner portion of the body region, a gate electrode facing the body region across a gate insulating film, a drain region of the first conductivity type and a collector region of the second conductivity type formed in the rear surface portion of the semiconductor layer such that the drain region and the collector region adjoin each other, and a drift region between the body region and the drain region, wherein the collector region is formed such that the collector region covers a region including at least two unit cells in the x-axis direction along the surface of the semiconductor layer.

Growing community of inventors

Kyoto, Japan

Seigo Mori