Stmicroelectronics S.a.

Sebastien Ferroussat

Andrew Cofler

Anne Merlande

A processor includes a program memory containing program instructions, and a processor core including several processing units and a central unit. The central unit, upon receipt of a program instruction, issues corresponding instructions to the various processing units. The processor core is clocked by a clock signal. A branching instruction received by the central unit, in the course of a current cycle, is processed in the course of the current cycle.

Method of handling branching instructions within a processor, in particular a processor for digital signal processing, and corresponding processor

A carry save adder circuit for reducing the number of inputs to a lower number of outputs, the carry save adder circuit including four carry save adders, the four carry save adders being arranged in two layers with the first and second carry save adders being arranged in a first of said layers and the third and fourth carry save adders being arranged in a second of the layers, said third and fourth carry save adders being arranged to provide the outputs, the third and fourth carry save adders each receiving at least one output from each of the first and second carry save adders and the first and second carry save adders being arranged to receive at least some of the inputs.

Carry save adders

An arithmetic unit for multiplying a first quantity x by a second quantity y, the arithmetic unit including a Booth coder having a plurality of inputs for receiving a plurality bits of the second quantity and a plurality of outputs for providing Booth coded outputs; and circuitry connected to at least one of the inputs and the outputs for modifying at least one output of the coder.

Arithmetic unit for multiplying a first quantity X by a second quantity Y

An arithmetic unit for adding a plurality of values to define a result, the arithmetic unit including circuitry for receiving the plurality of values; circuitry for adding the plurality of values to define a result, the result being within a first range; circuitry for determining if the result falls within a second range, the second range being smaller than the first range, the circuitry arranged to consider only some of the bits of the result; and circuitry for modifying the result in so that the result output by said arithmetic unit falls within the second range.

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Fontaine, France

Sebastien Ferroussat