Infineon Technologies Ag

Infineon Technologies Austria Ag

United Microelectronics Co.

Motorola Corporation

Infineon Technologies Sc300 Gmbh & Co., Kg

Technisat Digital Gmbh

Sebastian Schmidt

Peter Irsigler

Hans-Joachim Schulze

Oliver Hellmund

Thorsten Schedel

Martina Seider-Schmidt

Hang Yip Liu

Thomas Schafbauer

Yayi Wei

Anton Mauder

Benjamin Szu-Min Lin

Thomas Fischer

Hanno Melzner

Heiko Hommen

Ralf Otto

Andreas Peter Meiser

Karl Emerson Mautz

Jens Schneider

Stefan Miethaner

Donald Dibra

Robert Wiesner

Jens Zimmermann

Oliver Broermann

Karl Schumacher

Günter Hraschan

Diana Mattiza

Hang-Yip Liu

Guillaume Roesch

Markus Dankerl

Rolf Heine

Kamil Ciechan

Dominique Despang

Jens Krause

Norman Rother

Swantje Kriszick

A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.

Transistor device

A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Molding compound and semiconductor package with a molding compound

Devices and methods are provided where a control terminal resistance of a transistor device is set depending on operating conditions within a specified range of operating conditions.

Switch device

In accordance with an embodiment of an integrated circuit, a cavity is buried in a semiconductor body below a first surface of the semiconductor body. An active area portion of the semiconductor body is arranged between the first surface and the cavity. The integrated circuit further includes a trench isolation structure configured to provide a lateral electric isolation of the active area portion.

Isolation of semiconductor device with buried cavity

A semiconductor device includes a power transistor in a semiconductor substrate portion, where the semiconductor substrate portion includes a central portion and a kerf, components of the power transistor are arranged in the central portion, and the central portion has a thickness d. The semiconductor device also includes a support element disposed over a main surface of the central portion, where the support element has a smallest lateral extension t at a side adjacent to the main surface of the semiconductor substrate portion and a height h, where 0.1&#xd7;h&#x2264;d&#x2264;4&#xd7;h and 0.1&#xd7;h&#x2264;t&#x2264;1.5&#xd7;h.

Method of manufacturing a semiconductor device comprising a support element and semiconductor device comprising a support element

A method for forming a semiconductor device includes forming a plurality of non-semiconductor material portions at a first side of a semiconductor substrate; forming semiconductor material on the plurality of non-semiconductor material portions to bury the plurality of non-semiconductor material portions within semiconductor material; removing at least a portion of the semiconductor substrate from a second side of the semiconductor substrate to uncover the plurality of non-semiconductor material portions at a backside of the semiconductor device; and forming a rough surface at the backside of the semiconductor device by removing at least a subset of the plurality of non-semiconductor material portions while at least a part of a semiconductor material located laterally between the plurality of non-semiconductor material portions remains or by removing at least a part of a semiconductor material located laterally between the plurality of non-semiconductor material portions while the plurality of non-semiconductor material portions remain.

Methods for forming a semiconductor device and semiconductor devices

A bond pad structure includes a first oxide layer that overlies a substrate. A plurality of adhesion structures are formed over the first oxide layer. A second oxide layer is formed over the plurality of adhesion structures and the first oxide layer. Each one of a plurality of contact openings formed within a surface region of the second oxide layer includes one or more sides and is aligned over at least a portion of a top surface of a corresponding one of the plurality of adhesion structures. A barrier layer is formed within the surface region that is over the second oxide layer and within the plurality of contact openings and over the at least a portion of the top surface of the corresponding ones of the plurality of adhesion structures. A metal layer is formed over the barrier layer.

Bond pad structure

A chip includes a number a plurality of functional areas of a layer and a number of dummy structures within the layer. The dummy structures are spaced from the functional areas. Each dummy structure has a size that is a function of the size and density of the functional areas.

Structure and method for placement, sizing and shaping of dummy structures

A system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.

Transmission mask with differential attenuation to improve ISO-dense proximity

A material layer on a substrate being processed, e.g. to form chips, includes one or more functional structures. In order to control pattern density during fabrication of the chip, dummy fill structures of different sizes and shapes are added to the chip at different distances from the functional structures of the material layer. In particular, the placement, size and shape of the dummy structures are determined as a function of a distance to, and density of, the functional structures of the material layer.

An apparatus, system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.

A method for monitoring parameters of an exposure device for immersion lithography and an exposure device for immersion lithography are provided. In the course of the immersion lithography, the immersion liquid is fed to an analysis device as early as during the exposure. Alterations of the immersion liquid are detected during the exposure process on the basis of a comparison with desired values. The triggering of a warning signal indicates the deviations of the parameters of alterations of the immersion liquid from the associated desired values.

Exposure device for immersion lithography and method for monitoring parameters of an exposure device for immersion lithography

By a unit for determining fractions of a substance in a gas or gas mixture, measurements are carried out on the gas or gas mixture for purging a lens in a projection apparatus for projecting patterns onto a substrate. The results of a first measurement on the gas fed to the lens are compared with the results of a measurement of the gas removed from the lens. If, the substance is a contaminating substance that leads to a deposit on the lens under the influence of high-energy radiation from an illumination source, the difference is used to infer photochemical reactions on the surface of the lens that lead disadvantageously to the deposition. A signal is generated as a consequence of the comparison and is used to take preventive measures against a degradation of the lens. Mass spectrometers, electric or optical sensors and other known methods for substance analysis are used as measurement units.

Method for purging an optical lens

Growing community of inventors

Dresden, Germany

Sebastian Schmidt