Applied Materials, Inc.

Solexel, Inc.

Ob Realty, LLC

Other

Tesla, Inc.

Sean M Seutter

Mehrdad M Moslehi

Pawan Kapur

Virendra V Rana

Anthony Calcaterra

Karl-Josef Kramer

Michael Xiaoxuan Yang

Ming Xi

David Xuan-Qi Wang

R Suryanarayanan Iyer

Jacob W Smith

Sanjeev Tandon

Anand Deshpande

Takao Yonehara

Anchuan Wang

Christopher Sean Olsen

Gaurav Thareja

Xikun Wang

Sanjay S Natarajan

Yuji Maeda

Subramanian Tamilmani

Anqing Cui

Keyvan Kashefizadeh

Michael Wingert

Binh Hoa Tran

Sam Tone Tor

Dong Wu

Thom Stalcup

Virenda V Rana

Emmanuel Van Kerschaver

Thomas Mele

Li-Qun Xia

Joseph Yudovsky

Errol Antonio C Sanchez

Son Truong Nguyen

Jay D Pinson, Ii

Steve G Ghanayem

Kaushal Kishore Singh

Wendell Glenn Boyd, Jr

Ming Li

Shulin Wang

Anh Ngoc Nguyen

George D Kamian

Andrew C Lam

Yaxin Wang

Tatsuya E Sato

Bernard Lloyd Hwang

Sudhir R Gondhalekar

Alexander Tam

Badri N Ramamurthi

Martin John Ripley

Jay Ashjaee

Xianzhi Tao

Udayan Ganguly

Hanish Kumar Panavalappil Kumarankutty

David Dutton

Sunderraj Thirupapuliyur

Adam Brailove

Heather Deshazer

Swaroop Kommera

Lucien Date

Jeannot Morin

Solene Coutant

Hien Minh Le

Shekhar Athani

Yen-Sheng Su

Mun Kyu Park

Anil Kumar Kalal

Phillip Kraus

Randhir P Singh Thakur

Chih-Chiang Chuang

K-Josef Kramer

Gerry Olsen

Kamran Manteghi

Homi Fatemi

Robert Shydo

Embodiments of the disclosure provide electrostatic chucks for securing substrates during processing. Some embodiments of this disclosure provide methods and apparatus for increased temperature control across the radial profile of the substrate. Some embodiments of the disclosure provide methods and apparatus for providing control of hydrogen concentration in processed films during a high-density plasma (HDP) process.

Electrostatic chuck with improved temperature control

Films are modified to include deuterium in an inductive high density plasma chamber. Chamber hardware designs enable tunability of the deuterium concentration uniformity in the film across a substrate. Manufacturing of solid state electronic devices include integrated process flows to modify a film that is substantially free of hydrogen and deuterium to include deuterium.

Deuterium-containing films

A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.

Gate contact over active regions

Amorphous silicon doped yttrium oxide films and methods of making same are described. Deposition of the amorphous silicon doped yttrium oxide film by thermal chemical vapor deposition or atomic layer deposition process are described.

Amorphous silicon doped yttrium oxide films and methods of formation

Gate contact over active processes

Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.

Backplane reinforcement and interconnects for solar cells

Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

Systems and methods for laser splitting and device layer transfer

Apparatus, reactors, and methods for heating substrates are disclosed. The apparatus comprises a stage comprising a body and a surface having an area to support a substrate, a shaft coupled to the stage, a first heating element disposed within a central region of the body of the stage, and at least second and third heating elements disposed within the body of the stage, the at least second and third heating elements each partially surrounding the first heating element and wherein the at least second and third heating elements are circumferentially adjacent to each other.

Multi-zone resistive heater

Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.

High-efficiency solar photovoltaic cells and modules using thin crystalline semiconductor absorbers

A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 &#x3bc;m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.

Metal foil metallization for backplane-attached solar cells and modules

The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions and passivation layers using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions. Laser damage to the solar cell substrate is removed using an etch.

Aluminum oxide passivation and damage removal for solar cells

Laser patterning methods utilize a laser absorbent hard mask in combination with wet etching to form patterned solar cell doped regions to improve cell efficiency by avoiding laser ablation of an underlying semiconductor substrate associated with ablation of an overlying transparent passivation layer.

Damage free laser patterning of transparent layers for forming doped regions on a solar cell substrate

A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.

Multi-layer charge trap silicon nitride/oxynitride layer engineering with interface region control

Fabrication methods for making back contact back junction solar cells. A base dopant source, a field emitter dopant source, and an emitter dopant source are deposited on the back surface of a solar cell substrate. The solar cell substrate is annealed forming emitter contact regions corresponding to the emitter dopant source, field emitter regions corresponding to the field emitter dopant, and base contact regions corresponding to the base dopant source. The base dopant source, field emitter dopant source, and the emitter dopant source are etched. A backside passivation layer is deposited on the back surface of the solar cell. Contacts are opened to the emitter contact regions and the base contact regions through the backside passivation layer. Patterned base metallization and patterned emitter metallization is formed on the back surface of the solar cell with electrical interconnections to the base contact regions and the emitter contact regions.

Fabrication methods for monolithically isled back contact back junction solar cells

Processing equipment for the metallization of a plurality of semiconductor workpieces. A controlled atmospheric non-oxidizing gas region comprises at least two enclosed deposition zones, the controlled atmospheric non-oxidizing gas region is isolated from external oxidizing ambient. A temperature controller adjusts the temperature of the semiconductor workpiece in each of the at least two enclosed deposition zones. Each of the enclosed deposition zones comprising at least one spray gun for the metallization of the semiconductor workpiece. A transport system moves the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. A batch carrier plate carries the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. The controlled atmospheric non-oxidizing gas region further comprises a gas-based pre-cleaning zone.

High productivity spray processing for the metallization of semiconductor  workpieces

Growing community of inventors

San Jose, CA, United States of America

Sean M Seutter