International Business Machines Corporation

Samsung Electronics Co., Ltd.

Globalfoundries Inc.

Globalfoundries Singapore Pte. Ltd.

Sean Lian

Su Chen Fan

Ruilong Xie

Balasubramanian Pranatharthiharan

Fee Li Lie

Hsueh-Chung Chen

Andrew Mark Greene

Mark V Raymond

Linus Jang

Chor Shu Cheng

Chao Li

Siau Ben Chiah

Chee Kong Leong

Ming Lei

Xiongfei Yu

Kelvin Tianpeng Guan

Puay San Chia

Gary Chia

Kin San Pey

Dong Kwon Kim

Lieyong Yang

Hua Xiao

Techniques for forming self-aligned contacts by forming gate sidewall spacers and gates before forming the contacts are provided. In one aspect, a method of forming self-aligned contacts includes the steps of: forming multiple gate sidewall spacers on a substrate; burying the gate sidewall spacers in a dielectric; forming gate trenches by selectively removing the dielectric from regions between the gate sidewall spacers in which gates will be formed; forming the gates in the gate trenches; forming contact trenches by selectively removing the dielectric from regions between the gate sidewall spacers in which the self-aligned contacts will be formed; and forming the self-aligned contacts in the contact trenches. A device structure having self-aligned contacts is also provided.

Forming self-aligned contact with spacer first

An aspect of the invention includes a freestanding spacer having a sub-lithographic dimension for a sidewall image transfer process. The freestanding spacer comprises: a first spacer layer having a first portion disposed on the semiconductor layer; and a second spacer layer having a first surface disposed on the first portion of the first spacer layer, wherein the first spacer layer has a first dielectric constant and the second spacer layer has a second dielectric constant, the first dielectric constant being greater than the second dielectric constant, and wherein a dimension of each of the first and second spacer layers collectively determine the sub-lithographic lateral dimension of the freestanding spacer.

Freestanding spacer having sub-lithographic lateral dimension and method of forming same

A method of forming an IC is presented. The method includes providing a substrate having a plurality of transistors formed thereon. The transistors have gate stack, source and drain regions. An electrical strap is formed and in contact with at least a portion of at least one sidewall of the gate stack of a first transistor to provide a continuous electrical flowpath over a gate electrode of the first transistor and the source or drain region of a second transistor.

Integrated circuit structure with electrical strap and its method of forming

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Slingerlands, NY, United States of America

Sean Lian