Analog Devices International Unlimited Company

Analog Devices,inc.

Seamus Ryan

Pablo Ventura

Andrew David Alsup

Isaac Molina Hernandez

Sean M Mullins

Wei Che

Niall Daniel O'Connell

Tianjiang Li

Guillermo Oliver

Weijun Xu

Aspects of the present disclosure include a method, a switch, and/or a computer readable medium for analyzing a window of samples at an expected position of a plurality of input edges of a plurality of input waveforms, detecting the plurality of input edges, measuring a displacement of each input edge, with respect to a previous position, of the plurality of input edges, generating a value of the displacement of each input edge, incrementing a corresponding counter value of a plurality of accumulator values in response to each value of the displacement of a corresponding accumulator of the plurality of accumulators, normalizing the plurality of accumulator values, generating the plurality of accumulator values, summing the plurality of accumulator values output by the plurality of accumulators to generate an accumulated jitter value, and sending jitter result information based on the accumulated jitter value.

Apparatuses and methods for jitter measurement

A network interface module for coupling a host device to a switched network as a network node is described. The network interface module comprises a single half-duplex port for communicatively coupling to a shared bus of the switched network, at least one frame queue sized to store one multicast read frame received via the shared bus, and logic circuitry. The logic circuitry is configured to decode a read command for the interface module included in a payload of the multicast read frame that includes multiple read commands for other network nodes of the switched network, and transmit a response frame including read data on the shared bus when detecting the shared bus is available for transmitting.

Low complexity ethernet node (LEN) one port

Disclosed herein are systems and methods that use video line inversion for reducing impact of periodic interference signals on analog transmission of video signals over wired links/connections. In one aspect of the present disclosure, in certain circumstances, a transmitter may be configured to perform video line inversion on a certain subset of video lines of a video signal prior to transmitting the video signal to the receiver, and a receiver may be configured to perform a corresponding inversion for the same subset of video lines of the video signal received at the receiver. Such video line inversion performed by the transmitter and the receiver may advantageously allow reducing or eliminating the impact of periodic interference signals that might affect the video signal during transmission, resulting in an improved quality of the video rendered at the receiver side.

Video line inversion for reducing impact of periodic interference signals on analog video transmission

Embodiments of the present invention may provide a clock and timing generation scheme for a video signal processor (e.g., a scaler), which enables fast switching between different input video standards without disturbing the output clock or timing. The scheme also may minimize the number of video frames that are dropped or repeated at the output. This may be achieved by locking the video's output timing to the input timing and also by utilizing a frame buffer to remove instantaneous discontinuities caused when an input is changed.

Video processor timing generation

Growing community of inventors

Nenagh, Ireland

Seamus Ryan