Plastic Logic Limited

E Ink Corporation

Flexenable Limited

Seamus Burns

Henning Sirringhaus

Simon James Jones

Sharjil Siddique

Robert Waverly Zehner

Simon Jones

A touch sensitive active matrix display device is provided. The device includes a display fabricated on a first flexible substrate, said display having a viewing surface. The device further includes a touch sensitive sensor including a second flexible substrate, under said display. The touch sensor is operated by touching said viewing surface of said display, and said combined display and touch sensitive sensor is flexible.

Flexible touch screen display

An electro-optic display () comprises a backplane (); an electro-optic layer () adjacent the backplane (), the electro-optic layer () being smaller than the backplane () so as to leave a peripheral portion of the backplane extending beyond the edges of the electro-optic layer (); and a protective layer () disposed on the opposed side of the electro-optic layer () from the backplane (), a peripheral portion of the protective layer () extending beyond the edges of the electro-optic layer and being adhered (at) to the backplane ().

Electro-optic display with edge seal

A method is provided for fabricating a multilayer electronic device on a flexible substrate including at least a first and a second patterned layer, wherein the first patterned layer is defined with a linewidth that is smaller than the linewidth of the second patterned layer, and the second patterned layer is defined by a patterning technique which is capable of correcting for local distortions of the pattern of said first layer on top of the flexible substrate and wherein the first patterned layer is laid-out in such a way that the geometric overlap between a portion of the second layer and a portion of the first layer is insensitive against small variations of the position of the second patterned layer.

Alignment tolerant patterning on flexible substrates

A device architecture for an active matrix display pixel comprising source addressing lines and TFT drain electrode formed on a first metal level of the device, the pixel electrode formed on a second, separate metal level, and the TFT gate electrode and gate addressing lines on a third metal level separated from both the first level and the second level by at least one dielectric layer, wherein the pixel electrode on the second level is electrically connected to the drain electrode on the first level through a via-hole connection and a pixel capacitor is formed by overlap of part of the pixel electrode on the second level with a portion of the gate addressing line of a neighboring line of pixels on the third level. The device is formed preferably using print based methods.

Growing community of inventors

Cambridge, United Kingdom

Seamus Burns