Samsung Electronics Co., Ltd.

Se-Young Cho

Do-Young Kim

Takashi Noguchi

Kyung-bae Park

Jang-yeon Kwon

Ho Young Lee

Nae-in Lee

Jung-hyun Lee

Suk-Pil Kim

Hwa-Sung Rhee

Young-Soo Park

Sang-Myeon Han

Min-Koo Han

Ji-sim Jung

Chang-Wook Moon

Min-cheol Lee

Joong S Jeon

Yeon-Sik Park

A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate insulation layer formed on a silicon substrate, at least one nanorod embedded in the gate insulation layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate insulation layer between the source electrode and the drain electrode.

Field effect transistor having germanium nanorod and method of manufacturing the same

In a method of forming a polysilicon film, a thin film transistor including a polysilicon film, and a method of manufacturing a thin film transistor including a polysilicon film, the thin film transistor includes a substrate, a first heat conduction film on the substrate, a second heat conduction film adjacent to the first heat conduction film, the second heat conduction film having a lower thermal conductivity than the first heat conduction film, a polysilicon film on the second heat conduction film and the first heat conduction film adjacent to the second heat conduction film, and a gate stack on the polysilicon film. The second heat conduction film may either be on the first heat conduction film or, alternatively, the first heat conduction film may be non-contiguous and the second heat conduction film may be interposed between portions of the non-contiguous first heat conduction film.

Method of forming a polysilicon film and method of manufacturing a thin film transistor including a polysilicon film

A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiOgate insulating layer are deposited at a temperature of about 150&#xb0; C. using ICP-CVD. The poly-Si has a large grain size of about 3000 &#x212b; or more. An interface trap density of the SiOcan be as high as 10/cm. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

Method of fabricating poly-crystalline silicon thin film and method of fabricating transistor using the same

Provided is a method of forming a single crystal silicon thin film using an SLS method and a patterned grain boundary filtering region. The method of forming a single crystal silicon thin film by crystallizing an amorphous silicon layer deposited on a substrate, includes patterning the amorphous silicon layer to have a second region having a narrower width than the first and third regions to prevent grain boundaries from reaching the third region, wherein the second region connects a first region where the crystallization commences and the third region where a single crystal without beam boundaries can grow, partially forming a mask layer on the first region, and crystallizing the amorphous silicon layer by irradiating a laser beam from the first region to the third region in steps using a linear beam SLS method.

Method of forming single crystal silicon thin film using sequential lateral solidification (SLS)

Thin film transistor including a polysilicon film

Growing community of inventors

Seoul, South Korea

Se-Young Cho