Samsung Electronics Co., Ltd.

Se-yong Oh

Tae-Je Cho

Heung-Kyu Kwon

Jun-Young Jeon

Min-Ha Kim

Hai-jeong Sohn

Sang-Ho Ahn

Nam-seog Kim

Young-Hee Song

Dong-Hyeon Jang

Soon-Bum Kim

Sung-min Sim

Jae-sik Chung

Provided is a method of forming conductors (e.g., metal lines and/or bumps) for semiconductor devices and conductors formed from the same. First and second seed metal layers may be formed. At least one mask may be formed on a portion on which a conductor is to be formed. An exposed portion may be oxidized. The oxidized portion may be removed. A conductive structure may be formed on an upper surface of a portion which is not oxidized. The conductors may be metal lines and/or bumps. The conductive structures may be solder balls.

Method of forming metal lines and bumps for semiconductor devices

An ultra-thin semiconductor package includes a lead frame having a die pad and a plurality of leads surrounding the die pad. The die pad includes a chip attaching part to which a semiconductor chip is attached and a peripheral part integral with and surrounding the chip attaching part. The thickness of the chip attaching part is smaller than the thickness of the leads. The package device further includes bonding wires electrically connecting the chip to the leads, and a package body for encapsulating the semiconductor chip, bonding wires, die pad, and inner portions of the leads. A first thickness of the die pad is preferably between about 30-50% of a second thickness of the leads. An overall thickness of the package device is preferably equal to or less than 0.7 mm.

Ultra-thin semiconductor package device and method for manufacturing the same

Semiconductor packages are provided to prevent a chip, such as a central processing unit (CPU) chip, from being degraded due to hot spot heat generated during the operation of the chip and absorbs thermomechanical stresses in interfaces between the chip, a thermal interface material (TIM) and a lid. The chip is electrically connected, e.g., flip-chip bonded, to a package substrate. The lid is thermally connected to and disposed over a back surface of the chip with the TIM interposed therebetween. A heat dissipation means adjacent the TIM is also located between the lid and the chip to prevent the hot spot effect.

Semiconductor package

An ultra-thin semiconductor package includes a lead frame having a die pad and a plurality of leads surrounding the die pad. The die pad includes a chip attaching part to which a semiconductor chip is attached and a peripheral part integral with and surrounding the chip attaching part. The thickness of the chip attaching part is smaller than the thickness of the leads. The package device further includes bonding wires electrically connecting the chip to the leads, and a package body for encapsulating the semiconductor chip, bonding wires, die pad, and inner portions of the leads. A first thickness of the die pad is preferably between about 30&#x2013;50% of a second thickness of the leads. An overall thickness of the package device is preferably equal to or less than 0.7 mm.

A solder bump structure includes a contact pad, an intermediate layer located over the contact pad, a solder bump located over the intermediate layer, and at least one metal projection extending upwardly from a surface of the intermediate layer and embedded within the solder bump. Any crack in the solder bump will tend to propagate horizontally through the bump material, and in this case, the metal projections act as obstacles to crack propagation. These obstacles have the effect of increasing the crack resistance, and further lengthen the propagation path of any crack as it travels through the solder bump material, thus decreasing the likelihood device failure.

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Seoul, South Korea

Se-yong Oh