Amazon Technologies, Inc.

Se Wang Oh

Ron Diamant

Erez Izenberg

Guy Nakibly

Leonid Baryudin

Erez Sabbag

Avigdor Segal

Noga Smith

Yongseok Koh

Rashika Kheria

Techniques are described to perform hierarchical collective compute operations on a plurality of processing nodes for a distributed computation of a neural network. Each processing node can include a plurality of processing ranks that are assigned corresponding rank identifiers (IDs). The hierarchical collective compute operation can include direct memory access (DMA) transfers to perform an inter-node collective compute operation of non-contiguous memory regions across the processing nodes based on the rank IDs, and an intra-node collective compute operation of non-contiguous memory regions within each of the processing nodes based on the rank IDs.

Hierarchical collective compute operations using DMA transfers

Techniques are provided to maintain data coherency for data transfers among data processing devices in a distributed computing environment. A data buffer in each data processing device can be mapped to an address range that is assigned to transactions that allow out-of-order completions, and a message buffer in each data processing device can be mapped to an address range that is assigned to transactions that follow transaction ordering. Thus, a transaction to store a set of data into the data buffer is completed before a transaction to write a synchronization message in the message buffer indicating that the set of data is stored in the data buffer based on the mapping irrespective of the transaction ordering indicated by each transaction.

Transaction ordering based on target address

The integrity of transmitted data can be protected by causing that data to be transmitted twice, and calculating protection information (PI) for the data from each transmission. The PI can include information such as a checksum or signature that should have the same value if the data from each transmission is the same. If the PI values are not the same, an error handling procedure can be activated, such as may retry the transmission. For write operations, the data can be transmitted twice from a source to a storage destination, while for read operations, the data can be transmitted to a recipient then sent back from the recipient to the storage device, with PI calculated for each transmission. A component such as a storage processor can perform at least this comparison step. Such approaches can also be used for network transmission or high performance computing.

Data integrity protection

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Campbell, CA, United States of America

Se Wang Oh