Electronics and Telecommunications Research Institute

Kwangwoon University Industry-Academic Collaboration Foundation

Se-Wan Heo

Jong-Dae Kim

Tae-Moon Roh

Jung-Hee Suk

Chun-Gi Lyuh

Ik-Jae Chun

Yil-Suk Yang

Wan-Ki Park

Il-Woo Lee

Soon-Il Yeo

Seong-Won Lee

Disclosed herein are a smart plug-based power management method for preventing a power failure and an apparatus for the method. The power management method includes acquiring load amount information for each of multiple loads corresponding to power management targets, checking a maximum amount of power that is capable of being generated by a solar power generator, setting a power supply mode based on at least one of whether power is being supplied from a power system and a result of a comparison of the load amount information with the maximum amount of power, and performing power management so as to prevent a power failure by interrupting a supply of power so as to correspond to the power supply mode based on multiple smart plugs for controlling corresponding ones of the multiple loads.

Method for managing power for power failure prevention based on smart plug and apparatus using the same

Provided is a low power consumption processor. The processor includes: a plurality of blocks; a memory storing instructions that control each of the plurality of blocks; and a multi power controller generates a signal that activates at least one of the plurality of blocks according to an address storing the instruction, and provides a normal power voltage or a reduction power voltage in response to the activation signal.

Low power consumption processor

Provided is a bit stream processor using a reduced table lookup. The bit stream processor includes a bit stream exclusive register in a general purpose register in order to process data of a variable length effectively. Additionally, the bit stream processor an instruction of a table lookup method to which a prefix method is applied and a bit stream exclusive instruction in order to reduce an entire memory size.

Method of driving bit stream processor

Provided is a data processing circuit. A control unit outputs an operation control signal and a memory control signal. A plurality of program memories each outputs a command in response to the memory control signal. A plurality of arithmetic sections each selectively performs any one of the commands from the plurality of program memories in response to the operation control signal. Operation modes of the data processing circuit can be flexibly changed according to operation environments.

Arithmetic units responsive to common control signal to generate signals to selectors for selecting instructions from among respective program memories for SIMD / MIMD processing control

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Daejeon, South Korea

Se-Wan Heo