Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Samsung Displayco., Ltd.

Se-Hyoung Cho

Mee-Hye Jung

Il-Gon Kim

Hye-Seok Na

Dong-Gyu Kim

Dong-Hyeon Ki

Sung-Hoon Kim

Chong-Chul Chai

Jong-Hwan Kim

Seung-Soo Baek

Kyung-Hoon Kim

Doo-Hwan You

Kwang-Choon Kim

In-Jae Hwang

Woo-Sung Sohn

Hyang-Yul Kim

Jae-Yong Shin

Young-Hoon Yoo

Hong-Jo Park

Jang-Mi Kang

Kang-Hee Lee

Ye-Hoon Kim

Joon-Chul Goh

Hyun Joon Kim

Kwang-chul Jung

Seung-Hwan Cho

Bong-Hyun You

Dong-Woo Kim

Cheol-Gon Lee

Sang-uk Lim

Jangmi Kang

Sang-Jin Jeon

Jong-Hee Kim

Kang-Moon Jo

Hyun-Joon Kim

Hee-Rim Song

Seung-Hwan Choi

Jun-Ki Jeong

Young-Eun Jo

Sang-Hyeon Song

An electrostatic discharging circuit includes a first transistor including a first electrode electrically connected to a signal line, a second electrode receiving a first voltage, and a first gate electrode electrically connected to a first node. A second transistor includes a third electrode electrically connected to the signal line, a fourth electrode electrically connected to the first node, and a second gate electrode electrically connected to the first node. A first capacitor receives the first voltage and is electrically connected to the first node.

Electrostatic discharging circuit and display device including the same

A method of driving a display panel includes providing a positive polarity data signal to a first data line during an odd-numbered frame, and providing a negative polarity data signal to the first data line during an even-numbered frame. The positive polarity data signal has a first polarity. The negative polarity data signal has a second polarity. Output timing of the positive polarity data signal is different from output timing of the negative polarity data signal.

Method of driving display panel and display apparatus for performing the same

A display panel includes a high pixel electrode including a first stem which extends substantially in a first direction, and a second stem which extends substantially in a second direction crossing the first direction, a low pixel electrode including a first stem which extends substantially in the first direction, and a second stem which extends substantially in the second direction, a data line which extends in the second direction, a high storage line which extends substantially in the second direction and overlaps the second stem of the high pixel electrode, and a low storage line which extends substantially in the second direction and overlaps the second stem of the low pixel electrode.

Display panel and method of manufacturing the same

A display panel includes a gate line, a first data line crossing the gate line, a first voltage applied to the first data line, a second data line in parallel with the first data line and spaced apart from the first data line, a second voltage different from the first voltage applied to the second data line, a first thin film transistor electrically connected to the first data line, a second thin film transistor electrically connected to the second data line, a first pixel electrode electrically connected to the first thin film transistor, and disposed between the first data line and the second data line, and a second pixel electrode electrically connected to the second thin film transistor, and disposed opposite to the first pixel electrode with reference to the second data line.

A display panel includes a plurality of pixels which is arranged in a pixel column and a pixel row, a gate line which is connected to pixels in a same pixel row, a first data line which is connected to pixels in a same pixel column, and a second data line which is connected to remaining pixels except for the pixels connected to the first data line among the pixels in the same pixel column. Two odd-numbered pixel rows and two even-numbered pixel rows are alternately driven so that a charge period of the pixel may be extended by 2H. In addition, a kickback difference between the odd-numbered pixel row and the even-numbered pixel row may be decreased so that a display quality may be improved.

Display panel and display apparatus having the same

A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate and an opposing second substrate; a first pixel electrode and a second pixel electrode disposed in a pixel area, on the first substrate, and including a plurality of branch electrodes; and a liquid crystal layer interposed between the first and second electrodes. Branches electrode of the first pixel electrode and the second pixel electrode are interlaced. The first pixel electrode has an extension disposed adjacent to the center of the pixel area, and a minimum distance between the extension and the adjacent branch electrode is different from an average minimum between the adjacent branch electrodes.

Liquid crystal display

A gate drive circuit includes a shift register having a plurality of stages, in which an n-th stage ('n' is a natural number) of the plurality of stages is connected to at least one subsequent stage. The n-th stage includes a pull-up part configured to output a high voltage of an n-th gate signal using a high voltage of a clock signal as in response to a high voltage of a control node, a control pull-down part configured to pull-down a voltage of the control node into a low voltage in response to a carry signal outputted from at least one of next stages of the n-th stage and receiving a back-bias voltage corresponding to the low voltage, and a carry part configured to output the high voltage of the clock signal as an n-th carry signal in response to a high voltage of the control node.

Display apparatus having a gate drive circuit

An organic light emitting diode display device includes a display panel and a power supply. The power supply applies a first power supply voltage and a second power supply voltage to a first power supply voltage line. The first power supply voltage line includes a first extension, a second extension, and third extension. The first extension is disposed along a first direction from the first side portion to the second side portion. The first extension has a width that gradually decreases along the first direction. The second extension is disposed along a second direction that is perpendicular to the first direction. The third extension is disposed along a third direction that is opposite to the first direction. The third extension has a width that gradually decreases along the third direction.

Organic light emitting diode display device

A display panel includes: a first pixel including: a first high pixel configured to represent a first high gray level; and a first low pixel configured to represent a first low gray level; and a second pixel adjacent the first pixel in a first direction, the second pixel including: a second high pixel configured to represent a second high gray level based on a second data voltage and the common voltage in response to the first gate signal; and a second low pixel configured to represent a second low gray level based on the second data voltage, the common voltage, and a second divided voltage different from the first divided voltage in response to the first gate signal.

Display panel and method of driving the same

A thin film transistor array panel includes a substrate, a gate line extending in a first direction on the substrate, a data line extending in a second direction on the substrate and intersecting the gate line, a thin film transistor connected to the gate line and the data line, an insulating layer on the gate line, the data line, and the thin film transistor, a first auxiliary line on the insulating layer and connected to the gate line, a second auxiliary line on the insulating layer and connected to the data line, and a pixel electrode connected to the thin film transistor.

Thin film transistor array panel and method for manufacturing the same

A display panel includes a gate line, a gate electrode, a planarization layer, a gate insulation layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode. The gate electrode extends from the gate line. The planarization layer covers the gate line and the gate electrode to have an opening exposing a portion of the gate electrode formed therethrough. The gate insulation layer covers a portion of the gate electrode exposed by the opening and the planarization layer. The active layer is formed on the gate insulation layer and corresponds to the gate electrode. The data line is formed. The source electrode extends from the data line to cover a portion of the opening. The drain electrode is spaced apart from the source electrode and covers a portion of the opening. The pixel electrode is connected to the drain electrode.

A display panel includes a gate line which extends substantially in a first direction, a first data line which extends substantially in a second direction substantially perpendicular to the first direction, a second data line spaced apart from the first data line in the first direction and which extends substantially in the second direction, a high pixel electrode disposed between the first data line and the second data line and disposed adjacent to the gate line, a low pixel electrode disposed between the first data line and the second data line and disposed opposite to the high pixel electrode with reference to the gate line, a high storage line which extends substantially in the second direction and overlaps the high pixel electrode, and a low storage line which extends substantially in the second direction and overlaps the low pixel electrode.

A display apparatus includes a display panel, a gate driving part, and a date driving part. The display panel includes a switching element disposed in association with a pixel, a main gate line connected to the switching element, and a sub gate line spaced apart from the main gate line and connected to the main gate line via a first connecting part. The gate driving part is configured to: provide the main gate line with a main gate signal, and provide the sub gate line with a sub gate signal. The sub gate signal includes a transmission difference from the main gate signal. The data driving part is configured to provide a data line with a data signal.

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Hwaseong-si, South Korea

Se-Hyoung Cho