Freescale Semiconductor,inc.

Cirrus Logic Inc.

Scott Warrick

Massud Abubaker Aminpur

Christian Larsen

Alexander Barr

Marc Laurent Tarabbia

Magdy Samuel Abadir

Puneet Sharma

Kevin Cooper

Justin Dougherty

Kevin E Cooper

Lionel Riviere-Cazeaux

Ying Ying

Will Conley

Winston S Blackley

An integrated circuit (IC) substrate manufacturing process provides time-dependent device characteristic variation due to hydrogen absorption by including one or more gettering layers near the devices that would otherwise absorb hydrogen and exhibit the variation as the hydrogen migrates in the devices. The method includes forming or mounting the devices on a top surface of the semiconductor wafer in die areas of the substrate, forming semiconductor structures in the semiconductor die areas, forming a getter layer above or adjacent to the devices in the die areas, and processing the wafer with one or more processes exposing the wafer to vapor having a hydrogen content, whereby an amount of hydrogen absorbed by the devices is reduced by presence of the getter layer. The method produces wafers including semiconductor dies with reduced hydrogen absorption by the devices and packaged ICs including the dies.

Integrated circuit with getter layer for hydrogen entrapment

A dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET) may include a MOSFET having a channel region, a drain, and a source, a first gate formed proximate to the channel region, a drain extension region formed proximate to the drain, and a second gate formed proximate to the drain extension region.

Dual gate metal-oxide-semiconductor field-effect transistor

A method includes preferentially placing fill regions adjacent to transistors of a particular conductivity type, such as p-channel transistors, for a plurality of standard cell instances of a device design. The method also includes evaluating all transistors of the first conductivity type prior to evaluating any transistors of a second conductivity type. The second conductivity type is opposite the first conductivity type. For each transistor being evaluated, it is determined whether a criterion is me. A fill region is placed within a field isolation region adjacent to the transistor if the criterion is met.

Integrated circuit device with reduced leakage and method therefor

A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.

Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method

A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, forming a main mask over the dielectric layer, the main mask comprising a plurality of main mask openings arranged in a regular pattern extending over the dielectric layer, using a selector mask to select some of the plurality of main mask openings and removing portions of the dielectric layer through the selected some of the plurality of main mask openings to provide openings extending through the dielectric layer to the layer.

Method of forming openings in a semiconductor device and semiconductor device

An immersion lithography apparatus includes an optical system having a liquid delivery unit. The liquid delivery unit is arranged to deliver a layer of an immersion liquid onto a surface of a wafer as well as an annulus of a barrier liquid adjacent an exterior wall of the immersion liquid. The presence of the barrier liquid prevents ingress to the immersion liquid of a gas external to the immersion liquid.

Immersion lithography apparatus and method of performing immersion lithography

In the field of immersion lithography, it is known to provide a liquid between an optical exposure system and a wafer carrying layers of photosensitive material to be irradiated with a pattern by the optical exposure system. However, bubbles are known to form or exist in the liquid, sometimes close to a surface of the wafer resulting in scattering of light emitted from the optical exposure system. The scattering causes the pattern recorded in the layers of photosensitive material to be corrupted, resulting in defective wafers. Therefore, the present invention provides a bubble displacement apparatus comprising a drive signal generator for driving a force generator arranged to generate a force in response to a drive signal generated by the drive signal generator. The force generated urges the bubble away from the surface.

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Austin, TX, United States of America

Scott Warrick