Motorola Corporation

Scott W Krueger

James David Burnett

John Phillip Hansen

Juan Buxo

Eric Johan Salter

Danny Pak-Chum Shum

A semiconductor device having a memory array includes memory cells (,), a word line (,), a first bit line (,), and a second bit line (,). Within the memory array, the first and second bit lines (,and,) lie at different elevations above the word line (,). Local interconnects (,) are electrically connected to the first bit line (,) and some of the current carrying electrodes (,) in the memory array. The local interconnects (,) allow offset connections to be made. For floating gate memory cells (,) in a NOR-type memory array architecture, programming and erasing can be performed using a relatively uniform bias between the source and drain regions (,and,) of a memory cell (,) to be programmed without significantly disturbing data in adjacent floating gate memory cells (,).

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Leander, TX, United States of America

Scott W Krueger