International Business Machines Corporation

Scott W Crowder

Hubertus Franke

Chung-Sheng Li

Pratap Chandra Pattnaik

Matt Richard Hogstrom

Nagui Halim

Brad L Brech

Michael D Williams

Radha P Ratnaparkhi

Dimitrios Pendarakis

David Bruce Lindquist

Jeffrey Alan Frey

Josyula R Rao

Balachandar Rajaraman

Rodney A Smith

Stefan Pappe

Subramanian Srikanteswara Iyer

Michael John Hargrove

Ramachandra Divakaruni

Bomy A Chen

Paul David Agnello

Dennis Sinitsky

Hung Y Ng

Liang-Kai Han

David V Horak

Renato John Recio

Dominic Joseph Schepis

Sandra Guy Malhotra

Thomas M Shaw

Vincent James McGahay

Yu-Cheng Hsu

Wesley Charles Natzle

Robert Hannon

Anthony Gene Domenicucci

William Francis Landers

Chienfan Yu

Kam-Leung Lee

Charles Robert Davis

Dilip Dinkar Kandlur

Brett H Engel

Sadanand Vinayak Deshpande

Paul Andrew Ronsheim

Ronald Dean Goldblatt

Len Yuan Tsou

Melanie J Sherony

William M Chu

Suk Hoon Ku

Kai Chen

Diana Llera-Hurlburt

Derek Chen

Frederick William Buehrer

L Ronald Logan

There is a computer program product and computer system that includes program instructions programmed to establish a security container describing a workload and a set of resources in a software-defined environment, the security container including a set of sub-containers that are self-describing sub-containers having associated metadata describing content of a respectively corresponding sub-container, each sub-container of the set of sub-containers respectively corresponds to a resource-divisible portion of the workload, the set of resources being required by the workload, wherein a sub-container of the set of sub-containers is an operating system sub-container; monitor the workload and the set of resources for security events; and responsive to identifying a security event, adjust isolation mechanisms provided by the plurality of sub-containers at various layers of a stack. The set of sub-containers represents an end-to-end run time environment for processing the workload using the set of resources.

Security within a software-defined infrastructure

There is a computer program product and computer system that includes program instructions programmed to identify, in a software-defined environment, a security container describing a workload and a set of resources required by the workload, the security container including self-describing sub-containers having associated metadata describing content of a respectively corresponding sub-container; determine, for the workload, a set of resource-divisible portions of the workload including a compute-resource portion; generate a plurality of sub-containers within the security container, a sub-container within the plurality of sub-containers being a self-describing sub-container having associated metadata describing the content of the sub-container representing only one resource-divisible portion, the sub-container being an operating system sub-container; and responsive to identifying a security event while processing the workload, adjust a security mechanism associated with the security container. The plurality of sub-containers represents an end-to-end run time environment for processing the workload.

Outcome-based adjustment of a software-defined environment (SDE) includes determining a business operation and a corresponding set of tasks to be performed in a software defined environment (SDE), establishing a first resource configuration to perform the corresponding set of tasks to achieve a business outcome target, determining a first resource cost for performing the corresponding set of tasks, assigning a priority level to tasks within the corresponding set of tasks, determining a set of performance indicators corresponding to a task having a first priority level, monitoring the SDE to identify a triggering event, responsive to identifying the triggering event, establishing a second resource configuration based, at least in part, on a performance level of a performance indicator in the set of performance indicators, the second resource configuration addressing the triggering event, and determining a second resource cost for performing the corresponding set of tasks according to the second resource configuration.

Outcome-based software-defined infrastructure

A method and system for outcome-based adjustment of a software-defined environment (SDE) that includes establishing a link between a business outcome and a first resource configuration from software defined environment, establishing a monitoring mechanism for continuously measuring a current state of the SDE, using a behavior model of the SDE to anticipate, or forecast, a triggering event, and responsive to the forecast of a triggering event, using the behavior model to determine a second resource configuration to achieve the business outcome. The link includes at least one of a utility of services for the business outcome, a cost of a set of resources consumed by the first resource configuration, and a risk of the set of resources becoming unavailable.

There is a method and system that includes establishing a security container that describes a workload and a set of resources that corresponds to the workload in a software-defined environment, determining a set of security criteria for the security container, monitoring the workload and the set of resources for security events based, at least in part, upon the set of security criteria, and responsive to identifying a security event, adjusting one or more security mechanisms. The steps of monitoring and adjusting are operated within the software-defined environment.

There is a method and system for capability-based resource allocation in a software-defined environment that performs the following steps (not necessarily in the following order): (i) determining a set of capability characteristics for a plurality of workload resources within a software-defined environment; (ii) determining a set of workload components for a specified workload; and (iii) identifying a set of workload resources from the plurality of workload resources to allocate to the specified workload based, at least in part, on the set of capability characteristics corresponding to each workload within the set of workload resources. A workload component of the set of workload components has a unique set of workload characteristics.

Capability-based abstraction of software-defined infrastructure

An on-chip redundant crack termination barrier structure, or crackstop, provides a barrier for preventing defects, cracks, delaminations, and moisture/oxidation contaminants from reaching active circuit regions. Conductive materials in the barrier structure design permits wiring the barriers out to contact pads and device pins for coupling a monitor device to the chip for monitoring barrier integrity.

Multi-functional structure for enhanced chip manufacturibility and reliability for low k dielectrics semiconductors and a crackstop integrity screen and monitor

A blocking layer is formed on a hard mask having an initial thickness. Lines are fabricated by patterning the blocking layer and the hard mask to provide a line segment, the line segment having a first dimension measured across the line segment; reacting a surface layer of the line segment to form a layer of a reaction product on a remaining portion of the line segment; and removing the reaction product without attacking the remaining portion of the line segment and without attacking the blocking layer and the substrate to form the line segment with a second dimension across the line segment that is smaller than the first dimension. The blocking layer prevents the formation of reaction product on the hard mask so that the initial thickness of the hard mask is maintained. The blocking layer can also serve as an ARC layer for photoresist patterning so that the use of an additional film layer is not required.

Vapor phase etch trim structure with top etch blocking layer

A process for fabrication of both compact memory and high performance logic on the same semiconductor chip. The process comprises forming a memory device in the memory region, forming a spacer nitride layer and a protective layer over both the memory region and the logic region, removing the protective layer over the logic region to expose the substrate, and forming the logic device in the logic region. Cobalt or titanium metal is applied over all horizontal surfaces in the logic region and annealed, forming a salicide where the metal rests over silicon or polysilicon regions, and any unreacted metal is removed. An uppermost nitride layer is then applied over both the memory and logic regions and is then covered with a filler in the logic region. Chip structures resulting from various embodiments of the process are also disclosed.

Semiconductor chip having both compact memory and high performance logic

A semiconductor device having a silicon-on-insulator (SOI) structure includes a field-effect transistor having amorphized source and drain regions formed by implanting silicon or germanium ions into a silicon layer formed over a buried insulator. The fully amorphized source and drain regions ultimately result in permanent crystalline defects that cause p-n junction leakage which allows charge in the body of the device to dissipate, thereby improving the overall efficiency and performance of the device. The source and drain regions are amorphized throughout their entire thickness to prevent single crystal re-crystallization from occurring during annealing and other subsequent processing steps that can degrade the quality of the p-n leakage junctions.

Fully amorphized source/drain for leaky junctions

A method of forming a self-aligned vertical double-gate metal oxide semiconductor field effect transistor (MOSFET) device is provided that includes processing steps that are CMOS compatible. The method include the steps of growing an oxide layer on a surface of a silicon-on-insulator (SOI) substrate, said SOI substrate having a buried oxide region located between a top Si-containing layer and a bottom Si-containing layer, wherein said top and bottom Si-containing layers are of the same conductivity-type; patterning and etching gate openings in said oxide layer, said top Si-containing layer and said buried oxide region stopping on said bottom Si-containing layer of said SOI substrate; forming a gate dielectric on exposed vertical sidewalls of said gate openings and filling said gate openings with silicon; removing oxide on horizontal surfaces which interface with said Si-containing bottom layer; recrystallizing silicon interfaced to said gate dielectric and filling said gate openings with expitaxial silicon; forming a mask on said oxide layer so as cover one of the silicon filled gate openings, while leaving an adjacent silicon filled gate opening exposed; selectively implanting dopants of said first conductivity-type into said exposed silicon filled gate opening and activating the same, wherein said dopants are implanted at an ion dosage of about 1E15 cm or greater; selectively etching the exposed oxide layer and the underlying top Si-containing layer of said SOI substrate stopping on said buried oxide layer; removing said mask and implanting a graded-channel dopant profile in said previously covered silicon filled gate opening; etching any remaining oxide layer and forming spacers about said silicon filled gate openings; and saliciding any exposed silicon surfaces.

Method for self-aligned vertical double-gate MOSFET

A p-type MOSFET having very shallow p-junction extensions. The semiconductor device is produced on a substrate by creating a layer of implanted nitrogen ions extending from the substrate surface to a predetermined depth preferably less than about 800 &angst;. The gate electrode serves as a mask so that the nitrogen implantation does not filly extend under the gate electrode. Boron is also implanted to an extent and depth comparable to the nitrogen implantation thereby forming very shallow p-junction extensions that remain confined substantially within the nitrogen layer even after thermal treatment. There is thus produced a pMOSFET having very shallow p-junction extensions in a containment layer of nitrogen and boron in the semiconductor material.

Nitrogen co-implantation to form shallow junction-extensions of p-type metal oxide semiconductor field effect transistors

A semiconductor structure having silicon dioxide layers of different thicknesses is fabricated by forming a sacrificial silicon dioxide layer on the surface of a substrate; implanting nitrogen ions through the sacrificial silicon dioxide layer into first areas of the semiconductor substrate; implanting chlorine and/or bromine ions through the sacrificial silicon dioxide layer into second areas of the semiconductor substrate where silicon dioxide having the highest thickness is to be formed; removing the sacrificial silicon dioxide layer; and then growing a layer of silicon dioxide on the surface of the semiconductor substrate. The growth rate of the silicon dioxide will be faster in the areas containing the chlorine and/or bromine ions and therefore the silicon dioxide layer will be thicker in those regions as compared to the silicon dioxide layer in the regions not containing the chlorine and/or bromine ions. The growth rate of the silicon dioxide will be slower in the areas containing the nitrogen ions and therefore the silicon dioxide layer will be thinner in those regions as compared to the silicon dioxide layer in the regions not containing the nitrogen ions. Also provided are structures obtained by the above process.

Method for fabricating different gate oxide thicknesses within the same chip

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Pleasantville, NY, United States of America

Scott W Crowder