Other

Silicon Laboratories Inc.

I/o Sensors, Inc.

Input/output, Inc.

I/o of Austin, Inc.

Scott T Dupuie

Richard A Johnson

Ben William Jones

Michael L Abrams

Franklin W Mayo

Mark E Burchfield

Roger Maher

Burton A Devolk

Jeffery C Gannon

John James Paulos

Andrew W Dornbusch

Jeffrey Blackburn

Mauricio A Zavaleta

James M Nohrden

Mauricio Zavaleta

Frank Mayo

James Broseghini

A receiver () includes a direct digital frequency synthesizer (), a mixer (), and a clock source (). The direct digital frequency synthesizer has an input terminal for receiving a first clock signal at a first frequency, and an output terminal for providing a digital local oscillator signal synchronously with the first clock signal. The mixer () has a first input terminal for receiving a radio frequency (RF) signal, a second input terminal coupled to the output terminal of the direct digital frequency synthesizer (), and an output terminal for providing an IF signal having a spectrum centered about a selectable one of a plurality of center frequencies. The clock source () has an output terminal for providing the first clock signal without using a harmonic frequency that overlaps the spectrum for the plurality of center frequencies.

Television receiver suitable for multi-standard operation and method therefor

A telephone line interface and associated circuitry that may be implemented to simultaneously couple DC loop voltage, ring bursts, and caller-ID data to the phone line side of a DAA circuit through a single two wire resistively coupled interface. The interface and circuitry may be implemented to combine processing of the DC loop voltage and ring bursts into a single circuit, with processing of caller-ID data being performed separately.

Telephone line interface for DAA circuitry

A system for acquiring environmental information measurements. The 5 system () utilize a sensor, () a front-end circuit, () a loop filter (), a switch controller (), and a reduced-order loop control circuit to provide reliable data measurements while providing robust system behavior. The system further includes a sensor simulator () for simulating the operation of the sensor () and testing the operation of the front-end circuit () and the loop filter ().

Sensor

A multi-stage variable gain amplifier is disclosed that utilizes overlapping gain curves to compensate for log-linear errors. Each gain stage is configured to approximate a log-linear response with a sinusoidal error term such that a portion of the curve has positive errors and a portion of the curve has negative errors. In operation, the control signal inputs for the gain stages are driven such that the gain curves overlap and positive errors in each stage are offset by negative errors in the adjacent stage. The resulting combined gain is a more log-linear response.

Multi-stage variable gain amplifier utilizing overlapping gain curves to compensate for log-linear errors

A high performance method and apparatus for testing a closed loop transducer is disclosed. A test bitstream signal is combined with a .SIGMA..DELTA. feedback bitstream of the transducer to produce a combined bitstream which is converted to a physical feedback to the sensor of the transducer. The .SIGMA..DELTA. bitstream output of the transducer is recorded for later analysis so as to test characteristics of the transducer. The test bitstream signal is preferably an oversampled, pulse density modulated signal. A testing arrangement is provided which is based upon the storage of short-length test patterns which are repetitively accessed to form a continuous test pattern. The test bitstream provided by the method of the invention produces very low noise and low distortion test signals where a repetitive test pattern is equivalent in length to one period of the test signal.

Method and apparatus for generation of test bitstreams and testing of

Analog-to-digital and digital-to-analog converters are described which have internal reference voltage generators. These voltage generators include circuitry which senses the magnitude of the power supply voltage applied to the chip. The internal reference voltage generators then select one of two internal reference voltages as a reference voltage for the conversion operations depending on the magnitude of the power supply voltage.

Automatic voltage reference scaling in analog-to-digital and

A method and apparatus for measuring and compensating for stray capacitance of a micro-machined sensor of an accelerometer system is disclosed. Stray capacitance differences between a top plate and a sensing element and between a bottom plate and the sensing element degrade accelerometer performance if not compensated for. Measurement of stray capacitance difference is achieved by operating the accelerometer in two calibration phases and measuring the steady-state output voltage in each of the two phases. In calibration phase 1, no force is applied to the sensor during clock intervals 1-4. In calibration phase 2, a dummy force up is applied and then a dummy force down is applied during those intervals 1-4. The difference in the output voltage of the two calibration phases is representative of the difference in stray capacitance of the sensor. Capacitance is added to the top or bottom plates in an amount proportional to the measured stray capacitance. The procedure is repeated until the voltage difference of the two calibration phases is zeroed, which is indicative that the inherent stray capacitance has been zeroed.

Method and apparatus for calibration of stray capacitance mismatch in a

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Lakeway, TX, United States of America

Scott T Dupuie