Other

V Corp Technologies, Inc.

Linearity Gmbh

Innovation Digital, LLC

Scott R Velazquez

Richard J Velazquez

Yujia Wang

Ramsin Khoshabeh

Rich J Velazquez

The present invention is an architecture and method for radio frequency (RF) simultaneous transmit and receive applications that uses linear and nonlinear modeling to generate a very accurate, wideband analog signal that cancels self-interference before it is digitized by the receiver. In addition to this digitally assisted analog cancellation, another layer of signal cancellation is provided with digital blind source separation. Adaptive signal processing continuously monitors the level of cancellation and updates the processing to provide optimal performance in changing conditions (e.g., rapidly changing frequency content, signal power, temperature, etc.). Signal cancellation can be performed on extremely broadband signals providing high levels of cancellation, enabling a full-duplex RF transceiver. Furthermore, the present invention optionally includes an external signal canceller for cancelling unknown interference such as jamming.

Signal canceller

The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The adaptive Volterra compensator effectively removes nonlinear distortion in these systems by implementing an adaptive background algorithm to periodically update actual filter coefficients to maintain optimal performance in operating conditions varying over time (e.g., temperature, frequency, signal level, and drift); or both. The xadaptive background algorithm calculates the optimal nonlinear filter coefficients to reduce nonlinear distortion.

Adaptive volterra compensator

The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The multi-dimensional compensator effectively removes linear and nonlinear distortion in these systems by accurately modeling the state of the device by tracking multiple functions of the input, including but not limited to present signal value, delay function, derivative function (including higher order derivatives), integral function (including higher order integrals), signal statistics (mean, median, standard deviation, variance), covariance function, power calculation function (RMS or peak), or polynomial functions. The multi-dimensional compensator can be adaptively calibrated using simple arithmetic operations that can be completed with low processing requirements and quickly to track parameters that rapidly change over time, temperature, power level such as in frequency-hopping systems.

Multi-dimensional compensator

The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The compensator effectively removes nonlinear distortion in these systems in a computationally efficient hardware or software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results. For extremely wideband applications, the multi-rate Volterra filters are implemented in a demultiplexed polyphase configuration which performs the filtering in parallel at a significantly reduced data rate. The compensator is calibrated with an algorithm that iteratively subtracts an error signal to converge to an effective compensation signal. The algorithm is repeated for a multiplicity of calibration signals, and the results are used with harmonic probing to accurately estimate the Volterra filter kernels. The compensator improves linearization processing performance while significantly reducing the computational complexity compared to a traditional nonlinear compensator.

Compensator for removing nonlinear distortion

The present invention is an improved linearizer that implements more complex transfer functions to provide the necessary linearization performance with a reasonable amount of signal processing resources. Particularly, the linearizer operates on an analog-to-digital converter and comprises a distortion compensator and one or more factored Volterra compensators, which may include a second-order factored Volterra compensator, a third-order factored Volterra compensator, and additional higher-order factored Volterra compensators. Inclusion of factored Volterra distortion compensators improves linearization processing performance while significantly reducing the computational complexity compared to a traditional Volterra-based compensator.

Linearity compensator for removing nonlinear distortion

The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GHz instantaneous bandwidth, SFDR&#x3e;90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.

Adaptive digital receiver

The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GH; instantaneous bandwidth, SFDR&#x3e;90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.

In a compensator for compensating mismatches, and in methods for such compensation, the compensator compensates for mismatches in output signals of a system with mismatches during normal operation of the system with mismatches. The compensator comprises: a mismatch estimator that monitors at least two mismatched signals output by the system with mismatches during normal operation and that generates matching parameters indicating an amount of mismatch between the at least two mismatched signals, the mismatch estimator updating the matching parameters during normal operation of the system with mismatches, and a mismatch equalizer that compensates mismatches in the mismatched signals output by the system with mismatches during normal operation of the system with mismatches in response to the matching parameters.

Mismatch compensators and methods for mismatch compensation

The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics&#x2014;higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function. Different distortion transfer functions can be implemented for different operating conditions. The adaptive calibration technique is based on a feedback analysis technique, which updates the applicable distortion transfer function by analyzing the error signal between the introduced input signal and the output signal in real-time. The heuristic calibration technique implements different distortion transfer functions based on historical operating conditions and optimal configurations of the power amplifier.

Linearizer

Amplifier linearizer

Adaptive mismatch compensators and methods for mismatch compensation

In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for calibrating linearity error compensators.

Linearity error compensator

In one aspect, the present invention is directed to a converter for converting a signal from a first format to a second format. The converter includes a decomposition section, a converter array operatively coupled to the decomposition section, and a recombination section operatively coupled to the converter array. The decomposition section includes an input to receive the input signal, a splitter to divide the input signal into a plurality of signals, a plurality of signal outputs, each of which provides as an output one of the plurality of signals, and a clock circuit having a plurality of clock outputs for providing sample clocks to the converter array. The converter array includes a plurality of converters each having a signal input to receive one of the plurality of signals, each having a clock input to receive one of the sample clocks and each having an output that provides a converted signal. At least one of the decomposition section and the recombination section includes filters for filtering one of the plurality of signals and the plurality of converted signals. Other aspects of the invention are directed to methods for generating and calibrating analog and digital converters.

Parallel processing analog and digital converter

In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for adaptively calibrating the linearity error compensator.

Growing community of inventors

San Diego, CA, United States of America

Scott R Velazquez