Nxp Usa, Inc.

Freescale Semiconductor,inc.

Other

Scott M Hayes

Michael B Vincent

Zhiwei Gong

Jason R Wright

Stephen Ryan Hooper

Douglas G Mitchell

Weng Foong Yap

William H Lytle

George R Leal

Jianwen Xu

Richard Te Gan

Vivek Gupta

Rushik Prabhudas Tank

Betty Hill-Shan Yeung

Jinbang Tang

Glenn Graham Daves

Alan J Magnus

Dwight Lee Daniels

Giorgio Carluccio

Kabir J Mirpuri

Navjot Chhabra

Lakshminarayan Viswanathan

Mahesh K Shah

Mark Edward Schlarmann

Jerry B Minter

Vijay Sarihan

Maristella Spella

Walter Parmon

Scott Duncan Marshall

Wei Gao

Trung Duong

Julien Juéry

Namrata Kanth

Antonius Hendrikus Jozef Kamphuis

Craig S Amrine

Darrel R Frear

James E Drye

Chayathorn Saklang

Eduard Jan Pabst

Jeroen Johannes Maria Zaal

Yufu Liu

Lizabeth Ann Keser

Cheong Chiang Ng

Paul Southworth

Kabir Mirpuri

Pascal Oberndorff

Zhiwei (Tony) Gong

Zhiwei Gong (Tony)

A method of manufacturing a semiconductor device with an attached battery is provided. The method includes affixing a semiconductor die to a die pad region of a first battery lead of a leadframe. The first battery lead of the leadframe is separated from a second battery lead of the leadframe. An encapsulant encapsulates the semiconductor die and portions of the first and second battery leads of the leadframe. The battery is affixed to an exposed portion of the first battery lead of the leadframe such that a first terminal of the battery is conductively connected to the first battery lead. An exposed portion of the second battery lead of the leadframe is bent to overlap a top surface portion of the battery such that a second terminal of the battery conductively connected to the second battery lead.

Semiconductor device with attached battery and method therefor

A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A thermal conductive structure including a die pad portion is affixed to the semiconductor die. A limb portion of the thermal conductive structure extends laterally away from the die pad portion and overlaps a portion of the package substrate. A thermal conduction path is formed between the semiconductor die and a distal end of the limb portion.

Semiconductor device package having thermal dissipation feature and method therefor

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and an RF sub-assembly on a carrier substrate. The RF sub-assembly includes a sacrificial blank, a conductive radiant element, and a conductive shield. At least a portion of the semiconductor die and the RF sub-assembly is encapsulated with an encapsulant. The carrier substrate is separated from the encapsulated semiconductor die and RF sub-assembly to expose a side of the sacrificial blank. The sacrificial blank is removed to form a cavity in the RF sub-assembly such that the conductive radiant element and the conductive shield are exposed through the cavity. A package lid is affixed on the encapsulated semiconductor die and RF sub-assembly and configured to serve as a signal reflector for propagation of an RF signal.

Semiconductor device with enclosed cavity and method therefor

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die on a carrier substrate and placing a sacrificial blank on the carrier substrate with a routing structure attached to the sacrificial blank. At least a portion of the semiconductor die, sacrificial blank, and routing structure are encapsulated with an encapsulant. The carrier substrate is separated from a first side of the encapsulated semiconductor die, sacrificial blank, and routing structure to expose a surface of the sacrificial blank. The sacrificial blank is etched to form a cavity in the encapsulant and expose a portion of the routing structure exposed through the cavity.

Semiconductor device with open cavity and method therefor

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and routing structure on a carrier substrate. At least a portion of the semiconductor die and routing structure are encapsulated with an encapsulant. A cavity formed in the encapsulant. A top portion of the routing structure is exposed through the cavity. A conductive trace is formed to interconnect the semiconductor die with the routing structure.

A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.

Semiconductor device packaging warpage control

An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

Patterned and planarized under-bump metallization

A method of forming a self-aligned waveguide is provided. The method includes forming a first alignment feature on a packaged semiconductor device and a second alignment feature on a waveguide structure. A solder material is applied to the first alignment feature or the second alignment feature. The waveguide structure is placed onto the packaged semiconductor device such that the second alignment feature overlaps the first alignment feature. The solder material is reflowed to cause the waveguide structure to align with the packaged semiconductor device.

Semiconductor device with self-aligned waveguide and method therefor

A method of forming a semiconductor device is provided. The method includes providing a connector structure configured for carrying a signal and providing a semiconductor die. At least a portion of the connector structure and the semiconductor die are encapsulated with an encapsulant. The semiconductor die is interconnected with the connector structure by way of a conductive trace.

Semiconductor device with connector in package and method therefor

A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Semiconductor package thermal spreader having integrated EF/EMI shielding and antenna elements

A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.

Semiconductor device with waveguide and method therefor

A semiconductor device package having stress isolation is provided. The semiconductor device package includes a package substrate and a sensor attached to the package substrate. A first isolation material is formed around a perimeter of the sensor. An encapsulant encapsulates at least a portion of the first isolation material and the package substrate.

Semiconductor device package having stress isolation and method therefor

A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A first conductive connector is affixed to a first connector pad of the package substrate. A conformal thermal conductive layer is applied on the semiconductor die and a portion of the first surface of the package substrate. The conformal thermal conductive layer is configured and arranged as a thermal conduction path between the semiconductor die and the first conductive connector.

A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.

A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.

No-gel pressure sensor package

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Chandler, AZ, United States of America

Scott M Hayes