International Business Machines Corporation

Scott Leonard Daniels

Danny Marvin Neal

Yat Hung Ng

Bruce Gerard Mealey

Louis Bennie Capps, Jr

David Edward Halter

Daniel Eugene Pridgeon

Richard Martin Tonry

Alongkorn Kitamorn

Norman Karl James

Thomas R Forrer, Jr

James Douglas Jordan

Pat Allen Buckland

Terry Dwain Escamilla

Brian Anthony Oehlke

Cynthia Joan Armstrong

Embodiments may comprise a hybrid memory controller to facilitate accesses of more than on type of memory device, referred to generally hereafter as a hybrid memory device or hybrid cache device. The hybrid memory controller may include split logic to determine whether to split data of a write request into more than one portion and to store each portion in a different type of data storage device. For example, one embodiment comprises a hybrid memory controller to store data in both SRAM and DRAM devices. The SRAM and DRAM devices may include distinct circuits on a die, distinct dies within a chip, distinct chips on a memory module, distinct memory modules, or the like.

Methods and arrangements for hybrid data storage

A method and system for enhancing performance of a bus in a data processing system is described. The method includes monitoring priority of processes in an operating system queue along with data flow through adapters coupled to the bus in a data processing system, determining if increased bus performance is desirable, and adjusting bus parameters to enhance the performance of the bus if increased bus performance is desirable.

Method and system for system performance optimization via heuristically optimized buses

An apparatus and a method in a data processing system are provided for insuring the security of data accessed from removable media. Normal virus scanning occurs after data is loaded into the main memory, but infection by a virus may have already occurred by this time. Therefore, it would be beneficial to check for possible virus infection before the data is transferred to main memory. A security key is read from the removable media. As encrypted data is read from the device, it is decrypted using the security key and then re-encrypted using the same security key to produce new data. The original data is accepted and sent to main memory if it is identical to the new data produced by decryption and re-encryption. If the two sets of data are not identical, then the data transmission from the device is aborted and all data on the removable media is rejected. The decryption/re-encryption checking is performed in hardware and so it can occur in real time. This hardware could be on the device controller, a separate security card, the mother board, or anywhere along the data path from the device controller to the main memory.

Apparatus and a method for security authorization using a security key installed on removable media

A method and system for protecting electronic files from unauthorized access. The drive on which the file is stored is provided with a hardware identification code, which is unique to the drive. An Operating System (OS) extension allows a user to provide a security code required to access a requested drive. OS device driver, working in conjunction with the extension of the OS checks the requested drive to determine if an access code is required, and the drive responds with the security code or a default code. The default code indicates that the drive is globally accessible to users on the system. When a security code is returned, the OS compares the security code to the access code provided and provides the user with access to the drive only when the access code matches the security code.

Security keys for enhanced downstream access security for electronic file systems and drives

A method and an apparatus is presented for configuring a system bus topology dynamically. In a preferred embodiment, the system bus is a Small Computer System Interface (SCSI) bus that connects a 'daisy' chain of disk drives. Two types of disk drives are used: single ended (SE) 'Ultra' drives capable of 20 MHz operation and LVD (low voltage differential) &#x201c;Ultra Plus&#x201d; drives capable of 40 MHz operation. LVD disk drives can also function in the slower SE mode. The first drive in the chain of drives may need to be connected by a cable over three feet long. This introduces signal degradation that is often overcome by introducing redrive circuitry to boost signal quality. This is an expensive solution and a much easier solution is presented: install a jumper between the last drive in the chain and the first drive. However, if LVD bus mode is used, then this jumper solution does not work and the jumper must be removed. Disk drives in a server system are &#x201c;hot swappable,&#x201d; which means they can be changed at run time without shutting down the system. A method and an apparatus is provided for dynamically testing for the appropriate mode of bus operation based on the currently installed disk drives and adjusting the jumper setting accordingly.

Method and an apparatus for dynamically reconfiguring a system bus topology

A data processing system and method included within an oscilloscope for independently analyzing a signal input into the oscilloscope. The oscilloscope includes a plurality of triggering modes. A plurality of trigger parameters are specified for each of the triggering modes. Thereafter, the oscilloscope automatically analyzes the input signal, independently from any user input, utilizing each of the triggering modes and the trigger parameters specified for each of the triggering modes. The input signal includes a desired waveform and a plurality of undesired waveforms. While the oscilloscope is automatically analyzing the input signal, a determination is made regarding whether the oscilloscope triggered on one of the undesired waveforms. When it is determined that the oscilloscope triggered on one of the undesired waveforms, the undesired waveform upon which the oscilloscope triggered is stored.

Data processing system and method included within an oscilloscope for independently testing an input signal

A method and apparatus for preventing unauthorized access to data stored in memory utilizing two programmable logic devices as front end interfaces for the memory device and the data processing device which is to utilize the memory device, respectively. The two programmable logic devices are complementary programmed such that the signal lines between the data processing device and the memory core and/or their timing are scrambled at the interface between the two programmable logic devices, but are properly ordered with the proper timing at the interface between the memory core and the first programmable logic device and the interface between the data processing device and the second programmable logic device.

Method and apparatus for preventing unauthorized access of memory devices

A power-supply filter that is built into an integrated circuit package is disclosed. An LC, RC, or RLC filter is built into the integrated circuit's chip carrier module and connected so as to filter the power supply entering the integrated circuit. By manufacturing the filter as part of the integrated circuit package, a chip manufacturer can eliminate the need for application-level developers to provide an external filtering network in the deployment of the integrated circuit in an application circuit.

Built-in power supply filter for an integrated circuit

A method and system for performing direct memory access (DMA) transfers using operating system allocated I/O buffers provides a mechanism for device to device transfers without utilizing global system memory. Memory is allocated on a local bus to which both devices have a requested degree of affinity and transfers are performed to and from this memory. Operating system routines provide for selection of global system memory or local memory based on whether there is local memory available to which both devices have a requested degree of affinity. The memory can be deallocated after each transfer and reallocated for each subsequent transfer.

Method and system for performing DMA transfers using operating system allocated I/O buffers

An error injection tool, connected to a bus to be tested in such a manner as not to interfere with normal operation, is employed for error detection and recovery design verification. The error injection tool is connected to the bus to be tested within a data processing system, the system is powered on, and applications simulating normal system loading are run. A desired error is then selected, and the error injection tool is actuated. The error injection tool monitors bus cycles and transactions through selected signals and, upon detecting an appropriate cycle or transaction, overdrives a selected conductor within the bus being tested to inject an error. The selected bus conductor is overdriven (forced) to a logic high or a logic low for a single clock cycle, simulating the intermittent nature of errors likely to occur during normal operation. Bus error signals are then monitored to ascertain whether the error was successfully injected. If not, subsequent attempts during appropriate bus cycles or transaction may continue until error injection is successful. Once an error is successfully injected, the operation of fault isolation and recovery facilities for the bus being tested may be observed to ascertain whether they are properly functioning. The error injection tool is inexpensive, readily built from off-the-shelf components, easily adaptable to a variety of bus architectures, and very simple to employ.

Method and tool for computer bus fault isolation and recovery design verification

A method for checking security of data received by a computer system within a network environment is disclosed. In accordance with a preferred embodiment of the present invention, an incoming packet from a client is first decrypted within a receiving communications adapter by utilizing a master decryption key. The decrypted incoming packet is then encrypted by utilizing an encryption key identical to an encryption key employed by the client. A determination is made as to whether or not a packet produced from the encryption is identical to the incoming packet. In response to a determination that a packet produced from the encryption is identical to the incoming packet, the decrypted incoming packet is forwarded to a system memory of the computer system. As such, any incoming packet that does not meet this criterion will be rejected as a security threat.

Growing community of inventors

Cedar Park, TX, United States of America

Scott Leonard Daniels