Delco Electronics Corporation

Delphi Technologies, Inc.

Scott L Linke

Kirk A Bailey

Everett R Lumpkin

Jill Gosma Hersberger

Kevin J Brewer

Binary files in an executable file system can be directly executed by the central processing unit at the location in which the binary files are stored. A pre-runtime tool can traverse a replica directory hierarchy in a host/loading computer to fill an internal data structure which can be used to generate a binary file that can be loaded directly into the embedded computer. The central processing unit (CPU) and its components such as the address bus, data bus, and program counter, can directly interact with unit of storage interface mechanisms, such as read/write means, identifying location means, and concatenation means. In some embodiments, the page size in the memory management unit (MMU) of the CPU is set to the same size as the unit of storage.

Executable file system for an embedded computer

The present invention relates to a method and apparatus for verifying the correct performance of software on an electrical system by use of a cycle-based simulator. More specifically, it relates to an apparatus and method for simulating an electrical interconnection between two electronic subsystems, or modules, within a cycle based simulator. Two separate devices, a hardware output's driver and a hardware input's receiver, are characterized as one type of simulated object, a node, and the interconnection between the two devices as a second type of simulated object, a wire. The activity of output nodes is limited to placing signal values on the wire. Input nodes have a characteristic behavior in response to the information from output nodes. The wire is enhanced by storage and comparison functions that allow the comparison between new and current values of output signals as well as identification of the cycle associated with a particular change.

Method for modeling electrical interconnections in a cycle based

A data processing system having a mathematically consistent condition code architecture is disclosed for implementing single instruction range checking and limiting operations. The data processing system includes condition code flags that are set to provide indications of the occurrence of arithmetic overflow and the direction of the arithmetic overflow for all of the possible arithmetic operations that can be performed by an arithmetic logic unit within the digital processing system. Based upon the indicated occurrence of arithmetic overflow and the direction of the overflow, the numeric value of a software variable generated by one of the arithmetic operations is limited to an appropriate upper or lower bound of a predetermined range of acceptable values, if the numeric value was generated with the occurrence of arithmetic overflow, or the numeric value was generated without the occurrence of overflow, but was outside of the acceptable range of values.

Data processing system with condition code architecture for executing

A single integrated circuit operable in either a single chip mode or a host dependent mode. The integrated circuit comprises mode select circuitry for selecting the single chip mode or the host dependent mode, data acquisition circuitry for acquiring signals pertaining to a parameter to be displayed, control circuitry including serial engine circuitry for computing a gage displacement value based on the signals acquired by the data acquisition circuitry and a memory register for storing a gage displacement command, serial circuitry effective when the single chip mode is selected to store the computer gage displacement value in the memory register, and when the host dependent mode is selected to store a remotely generated displacement value in the memory register, signal conversion circuitry for converting the gage displacement command stored in the memory register to air core gage assembly drive commands and providing the same on a serial communication channel, and output circuitry for driving the air core gage assembly in response to the commands received on the serial communication channel.

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Flora, IN, United States of America

Scott L Linke