Fairchild Semiconductor Corporation

Scott L Hunt

Dean E Probst

James N Pan

Hossein Paravi

A semiconductor structure comprises trenches extending into a semiconductor region. Portions of the semiconductor region extend between adjacent trenches forming mesa regions. A gate electrode is in each trench. Well regions of a first conductivity type extend in the semiconductor region between adjacent trenches. Source regions of a second conductivity type are in the well regions. Heavy body regions of the first conductivity type are in the well regions. The source regions and the heavy body regions are adjacent trench sidewalls, and the heavy body regions extend over the source regions along the trench sidewalls to a top surface of the mesa regions.

High density trench field effect transistor

A method for forming a shielded gate field effect transistor (FET) includes forming a plurality of trenches in a semiconductor region and forming a shield electrode in a bottom portion of each trench. The method also includes forming a dielectric layer comprising a first oxide layer and a nitride layer both laterally extending over the shield electrode. The method also includes forming a gate electrode over the dielectric layer.

Method for forming a shielded gate trench FET

A shielded gate field effect transistor (FET) comprises a plurality of trenches extending into a semiconductor region. A shield electrode is disposed in a bottom portion of each trench, and a gate electrode is disposed over the shield electrode in each trench. An inter-electrode dielectric (IED) extends between the shield electrode and the gate electrode. The IED comprises a first oxide layer and a nitride layer over the first oxide layer.

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West Jordan, UT, United States of America

Scott L Hunt