Maxim Integrated Products, Inc.

Zilker Labs, Inc.

Ncipher Corporation Limited

Scott Kelly Herrington

Paul W Latham, Ii

Stewart Gall Kenly

James Warren Templeton

Gregg Kodra

Kenneth Wilson Fernald

Douglas Edward Heineman

Mark A Alexander

Kyle Stein

Randall Findley

Richard Goble

George Robert Blakley

A system includes a plurality of power supplies and a controller. The plurality of power supplies outputs power to a load. A serial bus connects the plurality of power supplies in a daisy chain. The controller is connected to first and last ones of the power supplies by the serial bus. The controller is connected to a management bus via a management bus interface. The controller monitors the plurality of power supplies via the serial bus. The controller transmits status information of the plurality of power supplies to the management bus via the management bus interface of the controller.

Daisy chain configuration for power converters

A method and system for generating a cryptographically random number stream () is provided. A system includes a module () configured to provide at least two statistically random number streams () and () and an oscillator () operably coupled to the module (). The oscillator () is configured to operate at a frequency which varies in response to physically unpredictable events and to select a current number from one of the at least two statistically random number streams () and () based on the oscillator's state. A process includes several steps. At least two statistically random number streams are provided (). A current number is selected () from one of the at least two statistically random number streams based on the state of an oscillator operating at a frequency which varies in response to physically unpredictable events. The step of selecting () is repeated () to create the cryptographically random number stream. The number streams can be carried by signals (), (), and (). An apparatus for performing the process is also disclosed.

Method and system for generating a cryptographically random number stream

A power converter including a hardware efficient control loop architecture. Error detection circuitry may generate an error signal based on the difference between a power converter output voltage and a reference voltage. An oversampling ADC may digitize the error signal. The transfer function associated with the ADC may include quantization levels spaced at non-uniform intervals away from a center code. A digital filter may calculate the average of the digitized error signal. A nonlinear requantizer may reduce the number of codes corresponding to the output of the digital filter. A proportional integral derivative (PID) unit may multiply the output of the nonlinear requantizer by PID coefficients to generate a PID duty cycle command, and a gain compensation unit may dynamically adjust the PID coefficients to maintain a constant control loop gain. A noise-shaped truncation unit including a multi-level error-feedback delta sigma modulator may reduce the resolution of the PID duty cycle command.

Hardware efficient digital control loop architecture for a power converter

Growing community of inventors

Cedar Park, TX, United States of America

Scott Kelly Herrington