International Business Machines Corporation

Scott F Schiffer

David Harold Surman

Georgette L Kurdt

David Arlen Elko

Jeffrey William Josten

Riaz Ahmad

Michael L Greenblatt

William Charles Neiman

Allen Carney

A system includes a shared memory accessible by a plurality of members of a shared memory system, and a processor operably coupled to the shared memory system. The processor is configured to receive a command from an exploiting member of the plurality of members, the command instructing an update to a piece of shared data, perform the update to the piece of shared data, and send an invalidation signal to each other member of the plurality of members. An invalidation signal sent to a respective member indicates that a local copy of the piece of data stored by the respective member is no longer valid, and each invalidation signal is sent asynchronously with respect to processing of the command. The processor is further configured to return the results of the command to the exploiting member.

Management of shared memory using asynchronous invalidation signals

A method for managing a cache structure of a coupling facility includes receiving a conditional write command from a computing system and determining whether data associated with the conditional write command is part of a working set of data of the cache structure. If the data associated with the conditional write command is part of the working set of data of the cache structure the conditional write command is processed as an unconditional write command. If the data associated with the conditional write command is not part of the working set of data of the cache structure a conditional write failure notification is transmitted to the computing system.

Conditional write processing for a cache structure of a coupling facility

Growing community of inventors

Poughkeepsie, NY, United States of America

Scott F Schiffer