Advanced Micro Devices Corporation

Ati Technologies Ulc

Scott F Dow

Gerald Robert Talbot

Michael J Tresidder

Milam Paraschou

Hanwoo Cho

Jeffrey Cooper

Damon Tohidi

Thomas H Likens, Iii

Varun Gupta

Chad S Gallun

Eric Ian Carpenter

Gurunath Dollin

Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.

Deskewing method for a physical layer interface on a multi-chip module

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Fruita, CO, United States of America

Scott F Dow