Quantum Corporation

Other

Scott E Richmond

Donald C Westwood

Eric J Botto

David B Jeppson

Richard J Blackborow

Claude E Camp

Peter S Hahn

Rodica Florea

James A Henson

William R Akin, Jr

Jon Bartnick

Bruce M McGeoch

A system and process is provided to deplete or remove moisture from wood coring in boats by piercinga fiberglass outer skin; formingbores or holesin wood coring to form an exposed portion; processing ambient airto create processed air; pumping or displacingprocessed air into the bores or holespenetratingan exposed portionwith a sealantand fillingthe exposed portionwith a sealant

System and method to remove moisture from boats

A clock generation circuit includes a reference clock for putting out a stable reference clocking signal. A digital ring oscillator includes a series circuit loop having at least one inverting gate and a programmable delay line of plural delays formed a series of tapped digital transmission gates connected between an output and an input of the inverting gate. A multiplexer selects among the series of taps in accordance with a tap selection signal. A clock monitoring circuit is connected to compare the clock output with a stable reference clocking signal to produce a digital clock cycle count. A programmed microcontroller generates the tap selection value as a function of the digital clock cycle count and a desired clock output frequency set point. And, a synchronization circuit synchronizes tap selection value applied to the multiplexer in relation to the present, adjustable clocking signal, and to a logical state of a successor, adjustable clocking signal to be put out by the digital ring oscillator following the tap selection, in order to avoid glitches and without interrupting oscillation.

Glitchless frequency-adjustable ring oscillator

A removable and transportable hard disk subsystem is provided for use with at least one computer and includes at least one hard disk module. The module contains a shock mounted, thin and compact micro-Winchester head and disk assembly which plugs into a base housing which is installable entirely within a well of the computer nominally allotted to receive a 51/4 inch half height disk drive. The base housing includes a head positioning and data module loading/unloading portion of the subsystem control electronics and an electromechanical mechanism for automatically loading and unloading the hard disk module. The base housing provides electrical connections for operating the head and disk assembly when loaded therein. The subsystem further includes an adapter board having a host interface portion of the subsystem control electronics and connected by a cable with the control electronics portion of the base housing, the adapter board for connecting the subsystem directly to address, data and control buses of said computer to enable storage and retrieval in the loaded module of host computer data blocks.

Removable and transportable hard disk subsystem

A solid state memory array includes an address bus and a bidirectional data bus and a plurality of partly defective VLSI memory array chips each containing at least one megabit of data storage capacity, having defective memory cell locations, being connected to the address bus, and providing plural data storage bit positions. Each memory array chip has a bidirectional tri-state driver connected between the bit lines thereof and corresponding ones of the data bus. At least one VLSI substitution memory chip contains at least one megabyte of data storage capacity, is connected to the address bus and provides plural data storage bit positions. A substitution chip tri-state driver is connected between the bit lines of the substitution memory chip and all of the parallel data bit lines of the data bus. A programmable read only memory is connected to be addressed by the address bus and is programmed for putting out a binary coded value which has been coded to identify each said defective memory cell location of each one of the memory array chips. A decoder is connected to receive and decode the binary coded value into tri-state driver control values and applies the values to the substitution chip tri-state driver and to one of the memory array chip bidirectional tri-state drivers so as to disable the memory array chip associated with the particular chip driver when a defective memory cell location thereof is addressed, and to enable the substitution memory chip at the particular location and connect it to the data bus in place of the associated memory array chip.

Solid state memory array using address block bit substitution to

Growing community of inventors

San Jose, CA, United States of America

Scott E Richmond