Nxp Usa, Inc.

Freescale Semiconductor,inc.

Scott Duncan Marshall

Lakshminarayan Viswanathan

Fernando A Santos

Yun Wei

Scott M Hayes

Jeffrey Kevin Jones

Mahesh K Shah

Ricardo Uscola

Alexander James Elliott

David James Dougherty

Jean-Christophe Nanan

Pierre-Marie J Piel

Xavier Hue

Jitesh Vaswani

Robert J McLaughlin

Taek Kyu Kim

Mall Mahalingam

Leadless power amplifier (PA) packages having topside termination interposer (TTI) arrangements, and associated fabrication methods, are disclosed. Embodiments of the leadless PA package include a base flange, a first set of interposer mount pads, a first RF power die, a package body. The first RF power die is attached to a die mount surface of the base flange and electrically interconnected with the first set of interposer mount pads. The TTI arrangement is electrically coupled to the first set of interposer mount pads and projects therefrom in the package height direction. The package body encloses the first RF power die and having a package topside surface opposite the lower flange surface. Topside input/output terminals of the PA package are accessible from the package topside surface and are electrically interconnected with the first RF power die through the TTI arrangement and the first set of interposer mount pads.

Leadless power amplifier packages including topside termination interposer arrangements and methods for the fabrication thereof

Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

Methods of fabricating leadless power amplifier packages including topside terminations

Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

Power amplifier packages and systems incorporating design-flexible package platforms

Leadless power amplifier packages including topside terminations and methods for the fabrication thereof

A packaged radio frequency (RF) amplifier device includes a flange and a transistor die mounted to the flange. The transistor die includes an output terminal. The packaged RF amplifier device includes a first bond wire array including a first plurality of bond wires. Each bond wire in the first plurality of bond wires is electrically coupled to the output terminal of the transistor die. A first ground loop area of a first bond wire in the first plurality of bond wires is greater than a second ground loop area of a second bond wire in the first plurality of bond wires.

Bond wire array for packaged semiconductor device

A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal 'coins' having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.

High power semiconductor package subsystems

Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.

Semiconductor devices with impedance matching-circuits

The disclosures made herein relate to RF power semiconductor devices. In accordance with one embodiment of the disclosures made herein, a RF power plastic semiconductor device comprises a semiconductor (RF) device, a Low Temperature Co-Fired Ceramic (LTCC) impedance matching structure electrically connected to the RF device and a plastic package body formed over the RF device and the impedance matching structure. The LTCC impedance matching structure comprises a metallized layer overlying a major body portion of the impedance matching structure and comprises a passivation layer on the metallized layer. The passivation layer enhances bond strength of a mold compound of the plastic package body to the metallized layer. Portions of the metallized layer are exposed through the passivation layer for enabling electrical interconnects to be formed between the LTCC impedance matching structure and the RF device. Preferably, RF power plastic packages in accordance with embodiments of the disclosures made herein exhibit terminal impedance of at least about twice that of conventional RF power plastic packages.

Growing community of inventors

Chandler, AZ, United States of America

Scott Duncan Marshall