Google Inc.

Other

Stretch, Inc.

Broadcom Corporation

Texas Instruments Corporation

Cisco Technology, Inc.

Silicon Graphics, Incorporated

Scott David Johnson

Timothy Jay Chen

Marius P Schilder

John R Nickolls

Albert RenRui Wang

Derek L Martin

Jeffrey Mark Arnold

Lynn Bos

Joshua Porten

Gareld Howard Banta

Won Kim

Benjamin Charles Serebrin

Freidoon Mehrad

Michael Brian Galles

Shrijeet Mukherjee

Eunchan Kim

Michael Stefano Fritz Schaffner

William Wesson

Allan Murray

Harrison Pham

Scott Robert Summerfelt

Jiong-Ping Lu

Mark Hayter

Lindsey H Hall

Martin M Deneroff

Lawrence John Madar, Iii

Mark R Williams

Ethan A Mirsky

Walfredo Cirne

Ted S Moise

Brian St Germain

Dominic Rizzo

Eden M Zielinski

Christopher Gori

Clint Montgomery

Ricardo E Gonzalez

Vivian Liu

Marius Paul Michiel Schilder

Kenneth Mark Williams

Erica Wickstrom Brand

Andy Yang

Neal Mueller

Vincent Palatin

John R Carlson

Bruce Saylors McNamara

Derek Taylor

Karthika Periyathambi

Reji K Koshy

Kambdur Kirthiranjan

Amrit Raj Pant

David J Roemer

Todd D Ganz

Geeta Chaudhry

Emma Spencer

Mark Williams

Lawrence J Iii Madar

Ethan Mirsky

An IC chip can provide silicon root of trust (RoT) functionality. In described implementations, the IC chip includes a processor, an interconnect, and multiple peripheral devices. These comportable circuit components are designed to facilitate interoperability and consistent, expected communications for security circuitry. Each peripheral device includes an interface that adheres to a common framework for interacting with the processor and with other peripheral devices. The interface includes an interconnect interface coupling the peripheral device to the interconnect and an inter-device interface coupling the peripheral device to at least one other peripheral device. The peripheral device is realized based on a peripheral device design code that indicates inter-device signaling in accordance with an inter-device scheme of an interface specification. Manufacturers fabricate the peripheral device, based on the design code, to be physically and logically coupled to another peripheral device in a predictable manner. This fosters more-robust and reliable security circuitry.

Peripheral device comportability with security circuitry

Systems, apparatuses, and methods for improving security of a silicon-based system by creating a glitch-resistant process for executing a software code block on the silicon-based system are disclosed. An example method may begin by marking the software code block as non-executable. Second, intent to execute the software code block is registered with a staging register. Third, the software code block is compressed into a compression constant. Fourth, the compression constant is compared with a first predetermined value using two comparators. Fifth, responsive to the comparators providing a true result after comparison, the software code block is marked as executable to allow the software code block to execute. In another aspect, the example method may be repeated for n>1 iterations, and in each iteration i, an ith software code block is compressed into an ith compression constant that is compared to an ith predetermined value.

Secure code jump and execution gating

An IC chip can provide silicon root of trust (RoT) functionality. In described implementations, the IC chip includes a processor, an alert handler, and multiple peripheral devices, which generate alert indications. The alert handler processes the alert indications, which have security implications. The alert handler includes multiple alert receiver modules to communicate with the multiple peripheral devices. The alert handler also includes a controller, multiple accumulation units, multiple escalation timers, and multiple escalation sender modules. These components can be organized into a hierarchy of increasing escalation severity. In operation, the controller classifies an alert and flexibly implements an adaptable alert handler path that is established through the escalation components responsive to the classification and based on a source of the alert. A path can conclude with an escalation sender module commanding an escalation handler to implement a security countermeasure. The flexible paths can therefore handle different types of alerts.

Alert handling

A wood or engineered wood structural panel, such as, but not limited to, OSB ('oriented strand board') or plywood, that is both fire-resistant and water resistant. The panel is factory-coated with a product that provides fire resistance. The treatment gives it a Fire-Resistant (FR) performance (for use in a one- or two-hour rated assembly). The panel also is overlaid or coated in a factory setting with a weather/water resistive barrier (WRB). The structural panel thus combines a fire-resistant structural sheathing and WRB product in one integrated panel produced at a factory prior for installation at a job site.

Fire-rated structural OSB panels with overlaid water-resistant barrier

Techniques and apparatuses are described that enable integrated second factor authentication. These techniques and apparatuses enable the improved security of something you have without the accompanying inconvenience or chance of loss. To do so, a secure physical entity is integrated within a computing device. While this provides the something you have without a need to carry a separate object with you, the something you have also must not be able to be accessed remotely. To prevent remote access physical wires are connected from the secure physical entity to physical structures on the computing device. In this way, a hacker or cyber thief cannot convince an authentication system that the cyber attacker does indeed have the something you have because to do so the attacker must be in physical possession of the computing device.

Integrated second factor authentication

Systems, apparatuses, and methods for improving security of a silicon-based system by creating a glitch-resistant process for executing a software code block on the silicon-based system are disclosed. An example method may begin by marking the software code block as non-executable. Second, intent to execute the software code block is registered with a staging register. Third, the software code block is compressed into a compression constant. Fourth, the compression constant is compared with a first predetermined value using two comparators. Fifth, responsive to the comparators providing a true result after comparison, the software code block is marked as executable to allow the software code block to execute. In another aspect, the example method may be repeated for n&#x3e;1 iterations, and in each iteration i, an ith software code block is compressed into an ith compression constant that is compared to an ith predetermined value.

A semiconductor chip device include device state fuses that may be used to configure various device states and corresponding security levels for the semiconductor chip as it transitions from wafer manufacturing to provisioned device. The device states and security levels prevent the semiconductor chip from being accessed and exploited, for example, during manufacturing testing. A secure boot flow process for a semiconductor chip over its lifecycle is also disclosed. The secure boot flow may start at the wafer manufacturing stage and continue on through the insertion of keys and firmware.

Secure device state apparatus and method and lifecycle management

This document describes techniques for authenticating an identity of a semiconductor component using a physical identifier. In some aspects, a physical identifier comprised of a region of features located indiscriminately within a surface of an encapsulated semiconductor component is fabricated. The physical identifier is then mapped. The map is then stored for use when authenticating the identity of the semiconductor component.

Physical identifiers for authenticating an identity of a semiconductor component

A device for handling hot objects and extinguishing a fire and a method of using the same are provided. A device for handling hot objects and extinguishing a fire includes: a first portion comprising an inner surface portion defining a pocket configured to receive a hand of a user therein; and a second portion configured to extinguish a fire by smothering, the second portion being configurable between a first configuration in which the second portion at least partially covers the first portion and has a first exposed surface area and a second configuration in which the second portion has a second exposed surface area greater than the first exposed surface area.

Oven mitt and pot holder devices with integrated fire extinguishing blanket

Systems, apparatuses, and methods for signing, and verifying the signature of, code to be executed by a target device. An example method of determining a verification hash of a code image to be executed by a target device comprises receiving a header and code image, determining an image hash based on metadata and the code image, determining a fuses hash based on values of hardware fuses of the target device, determining an information hash based on information stored in memory, determining a verification hash based on the image hash, the fuses hash, and the information hash, verifying the verification hash against a code signature in the header, obtaining an unlock constant based on the verification hash, comparing the unlock constant with a stored predetermined value to unlock a memory region of the target device, and executing the code in the code image on the target device.

Verification of code signature with flexible constraints

A true random number generator (TRNG) uses an analog circuit with a ring oscillator configured to collapse from an unstable oscillation state to a stable oscillation state at a random collapse time and counter counting a counter value representing the random collapse time. Various techniques are used to harden the TRNG including a truncator generating a true random number based on a truncation of the reference count value and a dedicated voltage regulator supplying power to the analog core including the ring oscillator. Techniques also include various solutions for drawing a constant current such as using a Gray code counter and adding noise current during and/or after the collapse event with a dummy inverter chain. Bit churning, bit obfuscation entropy enhancers and various post processing techniques may be employed to further harden the TRNG. An attack detection module may raise alerts when the TRNG is being attacked.

Hardened random number generator with ring oscillator collapse time random truncation

A fishing rod holder includes a retainer box having front, rear, upper and lower portions defined by a frame comprised of a plurality of upright frame members, wherein the plurality of upright frame members includes front upright frame members and rear upright frame members. The rear upright frame members include support portions for abuttingly supporting the retainer box in a raised position above a support surface. A planar member on the lower portion of the retainer box and includes a plurality of receiving apertures configured to receive a first portion of a fishing rod therethrough. First and second brackets are disposed on opposite sides of the retainer box having inwardly opening channels disposed therealong. Multiple divider members are slidingly received in the channels of the first and second brackets for movement therealong, wherein adjacent divider members are configured to retain a second portion of the fishing rod therebetween.

Fishing rod organizer and carrier

A method in a memory system having a security device and a serial external electrically erasable read-only memory (EEPROM) is disclosed. The method includes accepting N bits of a command prefix and matching the bits to command filtering rules. Upon matching the prefix to a command filtering rule, the method may perform a filter action associated with the matched rule. When the command prefix is for a destructive command prefix that can modify data in the EEPROM, the filter action may convert the command into a non-destructive command and inspect it for authentication. The converted command may be output to the external EEPROM without security processing in the security device and the external EEPROM may return read data without outputting. When the command prefix is for a non-destructive command prefix, the command may be allowed to pass through the external EEPROM unchanged without performing security processing in the security device.

SPI command censoring method and apparatus

A method for reading a first data bit from a non-volatile memory of a memory system is disclosed. The N most-significant bits are stored for each of M words in a rotated storage section. Address bits are serially received according to the clock signals. Before receiving a final address bit, a rotated word made up of the most significant bit of the M words is fetched from the rotated storage section. Address bits are serially received and rotated words are fetched until the N most-significant bits of the M words have been fetched. Then, un-rotated words are serially fetched from the non-volatile memory. Within one clock signal of the final address bit receipt, a bit is selected out of the fetched rotated words based on the received address bits. The first data bit is returned based on the selected bit and un-rotated words are returned based on the address.

Rotated memory storage for fast first-bit read access

Growing community of inventors

Santa Clara, CA, United States of America

Scott David Johnson