University of Minnesota

Saurabh Chaubey

Ramesh Harjani

Rakesh Kumar Palani

A low-dropout (LDO) regulator. The LDO regulator includes a pass transistor, a charge pump connected to the pass transistor, and an error amplifier connected through the charge pump to the pass transistor, wherein the error amplifier receives a voltage Vfrom the pass transistor and generates a voltage Vbased on the voltage V, wherein the charge pump receives the voltage Vfrom the error amplifier, generates a voltage V* that is lower than Vby an offset and supplies the voltage V* as a gate voltage to the pass transistor.

Low dropout regulator with smart offset

Capacitors that can be formed fully on an integrated circuit (IC) chip are described in this disclosure. An IC chip includes a metal-oxide-silicone (MOS) capacitor formed from a MOS transistor having a drain terminal, a source terminal, a gate terminal, and a body terminal. The drain terminal and the source terminal are not electrically connected to any other node, and the gate terminal and the body terminal form respective first and second terminals of the MOS capacitor. The IC chip also includes an electrical conductor coupled to one of the gate terminal or the body terminal of the MOS transistor and configured to deliver a voltage to operate the MOS capacitor in an accumulation mode.

Growing community of inventors

Minneapolis, MN, United States of America

Saurabh Chaubey