Dainippon Screen Mfg. Co., Ltd.

Screen Holdings Co., Ltd.

Screen Semiconductor Solutions Co., Ltd.

Maxell, Ltd.

Satoshi Yamamoto

Atsushi Yusa

Kenji Kamei

Masakazu Sanada

Tsuyoshi Mitsuhashi

Kenji Sugimoto

Minobu Matsunaga

Katsushi Yoshioka

Kaoru Aoki

Mitsumasa Kodama

Moritaka Yano

Takashi Nagao

Yasufumi Koyama

Kenji Hashinoki

Masami Ohtani

Yukihiko Inagaki

Tetsuya Hamada

Hiroyuki Ogura

Joichi Nishimura

Masahito Kashiyama

Kazuhito Shigemori

Akihiko Morita

Yoshihisa Yamada

Hiroyuki Takeuchi

Hideto Goto

Toru Momma

Naoki Usuki

Masaki Iwami

Hironori Ota

Kazuya Akiyama

Kazuhiro Nishimura

Toru Kitamoto

Masanori Imamura

Osamu Tamada

Shogo Yoshida

Masao Tsuji

Akiko Kito

Shoji Kirita

Junki Nishimura

Kazuo Morioka

Yasuo Imanishi

Toshiaki Dainin

Hideki Shimizu

Satoki Taniguchi

Kei Mizutani

Toshiharu Goto

A pumping apparatus includes a pump chamber, a piston, a motor, and a controller. The controller determines an imaginary terminal point by referring to a dispense command, theoretical information, and a current position of the piston. The controller corrects the imaginary terminal point to a target position by referring to a correction graph. The controller outputs a drive command to the motor for moving the piston from a start position to the target position.

Pumping apparatus and substrate treating apparatus

Each chemical processing section includes a chemical liquid bottle, a buffer tank, a pump, a filter, a discharge valve and a discharge nozzle. A chemical liquid stored in the chemical liquid bottle is led to the discharge nozzle and is discharged from the discharge nozzle to a substrate. A cleaning processing section includes a solvent bottle, a cleaning liquid bottle, the buffer tank and the pump. A solvent stored in the solvent bottle, a cleaning liquid stored in the cleaning liquid bottle and a gas supplied from a gas supply source are selectively led to the discharge nozzle in each chemical liquid processing section.

Substrate processing apparatus with a cleaning processing section for cleaning a chemical liquid processing section

A substrate treating apparatus is capable of promptly heating substrates after exposure, and avoiding an adverse thermal influence on an exposing apparatus. A developing block includes heating modules for heating exposed substrates. An interface block is interposed between the heating modules and the exposing apparatus to isolate the exposing apparatus from the thermal influence of the heating modules. The interface block has a transport mechanism for transporting the substrates to the heating modules, whereby the exposed substrates are promptly transferred to the heating modules.

Substrate treating apparatus

A substrate treating apparatus is provided for eliminating wasteful consumption of a treating solution in a treating mode in which the treating solution is delivered in a strip form to a substrate from a treating solution delivery nozzle sweeping over the substrate. In a first aspect of the invention, collecting vessels are arranged around a developing cup surrounding a wafer supported by a wafer holder. The collecting vessels collect part of a developer delivered from a discharge opening of a developer delivery nozzle outwardly of a surface of the wafer. In a second aspect of the invention, collecting vessels are arranged below a developer delivery nozzle, with collecting openings of the collecting vessels opposed to a discharge opening or openings of the delivery nozzle. The collecting vessels are moved longitudinally of the discharge openings according to a position of the developer delivery nozzle relative to the wafer.

Substrate treating method and apparatus

A substrate treating apparatus has an antireflection film forming block, a resist film forming block and a developing block arranged in juxtaposition, each of these blocks including treating modules and a single main transport mechanism. The main transport mechanism transports substrates within each block, and transfers the substrates between the blocks through inlet substrate rests and outlet substrate rests provided as separate components. This construction realizes improved throughput of the substrate treating apparatus.

A series of substrate transport paths for transporting substrates is arranged on upper and lower stories. Substrates are transferable between the substrate transport path on the first story and the substrate transport path on the second story. The paths include a going-only path for transporting the substrates forward, and a return-only path for transporting the substrates in the opposite direction, these paths being arranged on the upper and lower stories. An indexer connects one end of the substrate transport path on one story to one end of the substrate transport path on the other story. An interface connects the other end of the substrate transport path on one story to the other end of the substrate transport path on the other story. This construction efficiently reduces a waiting time due to interference between the substrates transported along the going-only path and the substrates transported along the return-only path.

Substrate treating apparatus and method

A substrate processing apparatus includes a coating section, a developing section, a heat-treating section and a transport mechanism. The coating section has first processing units each for performing a coverage process to supply a photoresist solution to a substrate and cover a surface of the substrate with the photoresist solution, a second processing unit for spinning the substrate, after the coverage process, at high speed to make the photoresist solution into a film, dry the photoresist film, and clean the substrate. All substrates are processed with the same coating conditions to suppress differences in quality among the substrates. The first and second processing units perform the respective processes concurrently to improve the throughput of substrate processing.

Substrate processing apparatus

A substrate processing apparatus reduces an instantaneous maximum power consumption at turn-on. Power receiving parts of a plurality of processing units are connected to one end of a turn-on switch respectively through switches. The other end of the turn-on switch is connected to an external power source through a breaker. Timer values are set in advance in the timers, respectively. When the turn-on switch is turned on, the timers turn on the associated switches respectively after times which are defined by the timer values, whereby the processing units are provided with electric power, each with a delay of a constant time.

Substrate processing apparatus having regulated power consumption and

A method and apparatus for exposing a substrate to light perform the steps of inputting position data of a peripheral region along an outline of a chip region on a substrate, which has been placed on a spin chuck, detecting a reference position at an outer edge of the substrate inputting axial directions of the position data and aligning axial directions of an orthogonal shifting mechanism. Based on the position data inputted, light of an irradiator is shifted along the peripheral region to expose the peripheral region in a staggered way along the outline of the chip region. The method and apparatus may also perform the steps of inputting a shape of the chip region on the substrate as image information, deriving position data of the peripheral region along the outline of the chip region from the image information, and exposing the peripheral region to light based on the position data derived. The method and apparatus may also perform the steps of inputting shape information of the substrate, the chip region, and an area around a crossing point of scribe lines in the chip region on the substrate as image information, computing the positions of the peripheral region from the image information and the shape information of the substrate and the chip region; and exposing the peripheral region to light based on the positions of the computed peripheral region.

Periphery exposing apparatus and method

A semiconductor wafer placed on a table is rotated by a stepper motor stepwise by a broad pitch. At this time, a CCD line sensor transmits output signals to comparators. A CPU monitors output signals of the comparators and detects a notch formed in the wafer. After the notch is detected, the wafer is rotated stepwise by a fine pitch, and outer peripheral positional data of a notched region (outputs of an analog-to-digital converter) are sampled and stored in a RAM. The CPU computes a notch position from the outer peripheral positional data stored in the RAM. In this way, a V-shaped notch formed in a semiconductor wafer is detected speedily and with high precision.

Apparatus for detecting position of a notch in a semiconductor wafer

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Kyoto, Japan

Satoshi Yamamoto