Shin-etsu Handotai Co., Ltd.

Tokyo Electron Limited

Fuji Electric Holdings Co., Ltd.

Satoshi Oka

Norihiro Kobayashi

Nobuhiko Noto

Hiroji Aga

Masahiro Kato

Katsunori Ueno

Takao Abe

Isao Yokokawa

Susumu Iwamoto

Masaro Tamatsuka

Masatake Katayama

Akitake Tamura

Susumu Kuwabara

Tohru Ishizuka

Yuichi Matsumoto

Daisuke Kishimoto

Toshihiko Miyano

Kazuo Mamada

Ryohsuke Shimizu

A silicon epitaxial wafer having a silicon epitaxial layer grown by vapor phase epitaxy on a main surface of a silicon single crystal substrate, wherein the main surface of the silicon single crystal substrate is tilted with respect to a [100] axis at an angle &#x3b8; in a [011] direction or a [0-1-1] direction from a (100) plane and at an angle &#x3c6; in a [01-1] direction or a [0-11] direction from the (100) plane, the angle &#x3b8; and the angle &#x3c6; are less than ten minutes, and a dopant concentration of the silicon epitaxial layer is equal to or more than 1&#xd7;10/cm. Even when an epitaxial layer having a dopant concentration of 1&#xd7;10/cmor more is formed on the main surface of the silicon single crystal substrate, stripe-shaped surface irregularities on the epitaxial layer are inhibited.

Silicon epitaxial wafer, method for manufacturing the same, bonded SOI wafer and method for manufacturing the same

The present invention is directed to a method for manufacturing an SOI wafer, the method by which treatment that removes the outer periphery of a buried oxide film to obtain a structure in which a peripheral end of an SOI layer of an SOI wafer is located outside a peripheral end of the buried oxide film, and, after heat treatment is performed on the SOI wafer in a reducing atmosphere containing hydrogen or an atmosphere containing hydrogen chloride gas, an epitaxial layer is formed on a surface of the SOI layer. As a result, there is provided a method that can manufacture an SOI wafer having a desired SOI layer thickness by performing epitaxial growth without allowing a valley-shaped step to be generated in an SOI wafer with no silicon oxide film in a terrace portion, the SOI wafer fabricated by an ion implantation delamination method.

Method for manufacturing SOI wafer

The present invention is directed to a method for producing a bonded wafer, the method in which heat treatment for flattening the surface of a thin film is performed on a bonded wafer made by the ion implantation delamination method in an atmosphere containing hydrogen or hydrogen chloride, wherein the surface of a susceptor on which the bonded wafer is to be placed, the susceptor used at the time of flattening heat treatment, is coated with a silicon film in advance. As a result, a method for producing a bonded wafer is provided, the method by which a bonded wafer having a thin film with good film thickness uniformity can be obtained even when heat treatment for flattening the surface of a thin film of a bonded wafer after delamination is performed in the ion implantation delamination method.

Method for producing bonded wafer

According to the present invention, there is provided a method for manufacturing an SOI wafer, the method configured to grow an epitaxial layer on an SOI layer of the SOI wafer having the SOI layer on a BOX layer to increase a thickness of the SOI layer, wherein epitaxial growth is carried out by using an SOI wafer whose infrared reflectance in an infrared wavelength range of 800 to 1300 nm falls within the range of 20% to 40% as the SOI wafer on which the epitaxial layer is grown. As a result, a high-quality SOI wafer with less slip dislocation and others can be provided with excellent productivity at a low cost as the SOI wafer including the SOI layer having a thickness increased by growing the epitaxial layer, and a manufacturing method thereof can be also provide.

Method for manufacturing SOI wafer and SOI wafer

A method for manufacturing a bonded wafer including the steps of: implanting at least one gas ion of a hydrogen ion and a rare gas ion into a bond wafer from a surface thereof to form an ion-implanted layer; bonding the ion-implanted surface of the bond wafer to a surface of a base wafer directly or through an oxide film; thereafter delaminating the bond wafer at the ion-implanted layer to prepare the bonded wafer having a silicon thin film formed on the base wafer; and performing a flattening heat treatment on the bonded wafer under an atmosphere containing hydrogen or hydrogen chloride, wherein a dopant gas is added into the atmosphere of the flattening heat treatment to perform the heat treatment, the dopant gas having the same conductivity type as a dopant contained in the silicon thin film.

Method for manufacturing bonded wafer

The present invention is a method for producing a semiconductor substrate, including steps of forming a SiGe gradient composition layer and a SiGe constant composition layer on a Si single crystal substrate, flattening a surface of the SiGe constant composition layer, removing a natural oxide film on the flattened surface of the SiGe constant composition layer, and forming a strained Si layer on the surface of the SiGe constant composition layer from which the natural oxide film has been removed, wherein the formation of the SiGe gradient composition layer and the formation of the SiGe constant composition layer are performed at a temperature Tthat is higher than 800&#xb0; C., the removal of the natural oxide film from the surface of the SiGe constant composition layer is performed in a reducing atmosphere through a heat treatment at a temperature Tthat is equal to or higher than 800&#xb0; C. and lower than the temperature T, and the formation of the strained Si layer is performed at a temperature Tthat is lower than the temperature T. This method enables epitaxial growth of the strained Si layer on the flattened SiGe layer without degrading surface flatness of the SiGe layer.

Method for producing semiconductor substrate

Provided is a method for producing an SOI substrate having a thick-film SOI layer, in which an ion-implanted layer is formed by implanting at least one kind of ion of hydrogen ion and a rare gas ion into a surface of a bond wafer, an SOI substrate having an SOI layer is produced by, after the ion-implanted surface of the bond wafer and a surface of a base wafer are bonded together via an oxide film, delaminating the bond wafer along the ion-implanted layer, heat treatment is performed on the SOI substrate having the SOI layer in a reducing atmosphere containing hydrogen or an atmosphere containing hydrogen chloride gas, and, after the surface of the SOI layer is polished by CMP, a silicon epitaxial layer is grown on the SOI layer of the SOI substrate.

Method for producing SOI substrate

A fabrication method of a semiconductor wafer can fill trenches formed in a semiconductor substrate with an epitaxial film with high crystal quality without leaving cavities in the trenches. The trenches are formed in the first conductivity type semiconductor substrate. Planes exposed inside the trenches are made clean surfaces by placing the substrate in a gas furnace, followed by supplying the furnace with an etching gas and carrier gas, and by performing etching on the exposed planes inside the trenches by a thickness from about a few nanometers to one micrometer. The trenches have a geometry opening upward through the etching. Following the etching, a second conductivity type semiconductor is epitaxially grown in the trenches by supplying the furnace with a growth gas, etching gas, doping gas and carrier gas, thereby filling the trenches. Instead of making the trenches slightly-opened upward, their sidewalls may be made planes enabling facet formation.

Fabrication method of semiconductor wafer

A silicon epitaxial layer is formed on the semiconductor underlayer of a target substrate (W) in the process chamber (). This forming method includes a pressure reducing step of reducing the pressure inside the process chamber () accommodating the target substrate (W), a vapor phase growth step of introducing a film formation gas containing silane gas into the process chamber () to grow a silicon epitaxial layer on the semiconductor underlayer, and a hydrogen chloride treatment step and a hydrogen heat treatment step performed therebetween. The hydrogen chloride treatment step is arranged to introduce the first pre-treatment gas containing hydrogen chloride gas into the process chamber (), thereby treating the atmosphere inside the process chamber (). The hydrogen heat treatment step is arranged to introduce the second pre-treatment gas containing hydrogen gas into the process chamber (), thereby treating the surface of the semiconductor underlayer.

Method for forming silicon epitaxial layer

A method for heat treatment of a silicon wafer in a reducing atmosphere through use of a rapid thermal annealer (RTA) is provided. In the method, the silicon wafer is heat-treated at a temperature of 1150&deg; C. to 1300&deg; C. for 1 sec to 60 sec in a mixture gas atmosphere of hydrogen and argon. Hydrogen is present in the mixture gas atmosphere in an amount of 10% to 80% by volume. Hydrogen is preferably present in the mixture gas atmosphere in an amount of 20% to 40% by volume. The method decreases COP density on the surface of the silicon wafer to thereby improve electrical characteristics, such as TZDB and TDDB, of the silicon wafer, suppresses the generation of slip dislocation to thereby prevent wafer breakage, and utilizes intrinsic advantages of the RTA, such as improvement in productivity and reduction in hydrogen gas usage.

Method for heat treatment of silicon wafer and silicon wafer heat-treated by the method

There is disclosed a heat treatment method for a silicon wafer in which the silicon wafer is heat treated in a reducing atmosphere through use of a rapid heating/rapid cooling apparatus. The silicon wafer is heat treated for a period of 1 to 60 seconds at a temperature in the range of 1200&deg; C. to the melting temperature of silicon. The heat treatment method can reduce the density of COPs and micro-defects which serve as nuclei of oxidation induced stacking faults at the surface of the silicon wafer.

Heat treatment method for a silicon wafer and a silicon wafer heat-treated by the method

There is disclosed a method of producing a silicon single crystal wafer wherein a silicon single crystal ingot in which nitrogen is doped is grown by Czochralski method, the single crystal ingot is sliced to yield a silicon single crystal wafer, and then the silicon single crystal wafer is subjected to heat treatment with a rapid heating/rapid cooling apparatus, and the silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wherein growth of crystal defects (grown-in defects) in silicon single crystal produced by CZ method are suppressed, particularly growth of crystal defects are prevented in the surface layer of the wafer, and crystal defect can be surely removed by a short time heat treatment even if small crystal defects are generated.

Method for producing a silicon single crystal wafer and a silicon single

A silicon nitride layer 12b is thermally grown on the topmost surface of the heat treatment jig 12 composed of silicon or silicon carbide in a nitrogen ambience. The silicon nitride layer 12b is thermally grown in a nitrogen ambience in the temperature range of 1,100.degree. C.-1,300.degree. C. It is desirable to remove slightly the surface of the jig by, for example, hydrogen etching before thermally growing the silicon nitride layer 12b. After the etching, a silicon oxide layer can be thermally grown on the jig surface in an oxygen ambience before thermally growing the silicon nitride layer 12b.

Growing community of inventors

Annaka, Japan

Satoshi Oka