Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Kitano, Katsuhisa

Ikawa, Satoshi

Tani, Atsushi

Nakashima, Yoichi

Hamaguchi, Satoshi

Satoshi Ikawa

Akihiro Miyazaki

Kunihiko Hayashi

Kengo Nishimura

Kazuyuki Uchida

Jyunichi Nakahashi

Kazutoshi Funahashi

Masaru Nagayasu

Katsuhisa Kitano

Yoichi Nakashima

Atsushi Tani

Satoshi Hamaguchi

In synchronization of a conventional AV system, when a stream as the master stops, a system clock cannot be corrected for synchronization. Since the correction is consistently performed even when an error is small, overhead of correction is large. On the other hand, when an error is large, sharp correction causes a feeling that something wrong. In the present invention, when the stream as the master stops, previously registering the degree of priority regarding the master, consideration of a corrected period or a previous error for the system clock, or transmitting a stream containing information regarding the master can allow for other process to serves as the master. Accordingly, it is possible to provide a method for synchronization with maintaining correction of the system clock. When a corrected error is large, gradual correction or reference can provide a system with normal feeling. Furthermore, when an error of correction is small, omission of correction or reference can provide a system with less overhead.

AV synchronization system

The data sharing apparatus in the present invention includes a first processor and a second processor, each of a different endianness, that are both connected to the memory via the data bus, in a byte order based on the endianness of the first processor. It also includes an address conversion unit which converts at least one lower bit of an address to indicate a reversed position of data in the data bus, and outputs the converted address to the memory, in the case where the second processor performs a memory access on the shared memory for data with a smaller width than the data bus.

Data sharing apparatus and processor for sharing data between processors of different endianness

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Osaka, Japan

Satoshi Ikawa