Mitsubishi Denki Kabushiki Kaisha

Satoshi Hamamoto

Kaoru Motonami

Shigeru Shiratake

Mikio Deguchi

Takaaki Murakami

Satoshi Arimoto

Yasuyoshi Itoh

Yuichi Yokoyama

Hiroshi Matsuo

Kenji Yasumura

Ritsuko Gotoda

Kenji Morisawa

Norio Hayafuji

Hiroaki Morikawa

Hisao Kumabe

Yoshitatsu Kawama

Hideo Naomoto

Shigeru Mitsui

There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode. This prevents shaving of the gate insulating film and the underlying substrate surface.

Semiconductor device having an element isolating oxide film and method

In a semiconductor device having a polycide structure located on a stepped portion, halation during formation of a resist pattern is prevented, and oxidation of an upper surface of a high-melting-point metal silicide layer is prevented during formation of an interlayer insulating film on the polycide structure. In this semiconductor device, an upper layer which is formed of one layer selected from the group consisting of an amorphous silicon layer, a polycrystalline silicon layer, a TiN layer and a TiW layer is formed on the high-melting-point metal silicide layer forming the polycide structure. This effectively suppresses reflection of light beams by the upper layer located at the stepped portion during exposure for forming the resist pattern on the upper layer. Thereby, formation of a notch at the resist pattern is prevented, and the resist pattern is accurately formed to have a designed pattern. The upper layer made of the amorphous silicon layer or polycrystalline silicon layer prevents formation of an oxide layer at an upper surface of the high-melting-point metal silicide layer due to oxydation by Oxygen carried to the inside of the CVD furnace from the outside during formation of an interlayer insulating film covering the polycide structure.

Semiconductor device having a polycide structure

In a method for fabricating a thin film solar cell, a thin semiconductor film serving as a power generating layer is formed on a substrate via an intermediate layer, a plurality of holes are formed penetrating through the thin semiconductor film and reaching the intermediate layer, and the intermediate layer is etched away through the through-holes, separating the thin semiconductor film from the substrate with high-efficiency. Since stress is hardly applied to the thin semiconductor film during the separation process, cracking and breaking of the semiconductor film is avoided. Further, since the surface of the substrate is maintained in good condition, the substrate can be reused, resulting in a reduction in the production cost.

Method for producing thin film solar cell

A method for producing a semiconductor structure including a semiconductor film formed on a semiconductor substrate body via an insulating film includes: laminating a first insulating film, a first semiconductor film, and a second insulating film on the semiconductor substrate successively; forming stripe-shaped second semiconductor films of predetermined width on the second insulating film arranged periodically at a predetermined interval and covering these second semiconductor films with a third insulating film; performing zone melting recrystallization of the first semiconductor film from one end of the substrate to the opposite end along the stripe direction of the stripe-shaped second semiconductor film; etching the third insulating film and portions of the second insulating film not sandwiched by the first and second semiconductor films; oxidizing portions of the second semiconductor film and the first semiconductor film exposed in the etching step and etching and removing the second insulating film remaining after the previous etching. Thus, a semiconductor substrate including a recrystallized semiconductor film having removed sub-grain-boundaries generated during the zone melting recrystallization, is obtained by fewer process steps than in the prior art.

Method of producing a semiconductor structure including a recrystallized

In a method of producing a thin-film solar cell, a graphite sheet in which the breaking stress in a thickness direction is smaller than the breaking stress in a direction perpendicular to the thickness direction is adhered to a heat resistant substrate, a semiconductor thin film is formed on the graphite sheet in a high temperature process, a second substrate for supporting the semiconductor thin film is adhered to the semiconductor thin film, and the graphite sheet is broken by applying a mechanical stress to the heat resistant substrate and the second substrate. The semiconductor thin film is reliably supported by the heat resistant substrate during high temperature processing and easily removed from the heat resistant substrate by breaking the graphite sheet. In addition, since the graphite sheet has an anisotropic breaking stress, fragments of the graphite sheet remaining on the surface of the semiconductor thin film are easily removed. As a result, a high quality thin film solar cell is produced reliably at low cost.

Method of producing thin-film solar cell

Growing community of inventors

Hyogo, Japan

Satoshi Hamamoto