Nec Corporation

Elpida Memory, Inc.

Hitachi-kokusai Electric Inc.

Ps4 Luxco S.a.r.l.

Satoru Sugiyama

Takaaki Noda

Jie Wang

Kazuaki Tonari

Yuuta Nishioka

A semiconductor device is provided, which includes an annular insulation separation portion penetrating a semiconductor substrate, and an electrode penetrating the semiconductor substrate in a region surrounded by the annular insulation separation portion, wherein the insulation separation portion includes at least a first film that gives compressive stress in a depth direction on the side of a substrate, a second film that gives tensile stress in the depth direction is formed on the first film, and film thicknesses of the first and second films are adjusted so that the compressive stress and the tensile stress are almost balanced.

Semiconductor device and manufacturing method thereof

A manufacturing method of a semiconductor device is provided, comprising: loading a substrate into a processing chamber; forming a first film on the substrate by supplying silicon atom-containing gas, boron atom-containing gas, and germanium atom-containing gas into the processing chamber; forming a second film on the first film by supplying the silicon atom-containing gas and the boron atom-containing gas into the processing chamber; and unloading the substrate from the processing chamber.

Manufacturing method of semiconductor device and substrate processing apparatus

This invention relates to a manufacturing process for a semiconductor device, comprising injecting a silane compound and a dopant into a low-pressure chemical vapor deposition reactor to deposit a doped silicon film on a wafer; and at the end of the deposition, injecting an oxidizing gas to form an oxide film over the silicon film deposited in the reactor. According to this invention, anomalous growth or generation of foreign matters such as particles during a deposition step can be effectively minimized to improve a production yield and provide a high-quality and highly reliable semiconductor device.

Manufacturing process for a semiconductor device

An interlayer insulator film in a semiconductor device comprises a BPSG film formed to cover a circuit pattern formed on a semiconductor substrate, and a ladder structure SOG film having a ladder structure in a molecular structure, to cover the BPSG film. The ladder structure SOG /film is etched back by a dry etching to partially expose the BPSG film, /and an exposed portion of the BPSG film is selectively etched by a wet /etching of a buffered HF using the remaining SOG film as a mask, since a /selective etching ratio by the buffered HF between the ladder structure /SOG film and the BPSG film is large. Thus, a planarized interlayer /insulator film formed of the remaining BPSG film and the remaining /ladder structure SOG film is obtained.

Growing community of inventors

Tokyo, Japan

Satoru Sugiyama