Fujitsu Corporation

Satoru Nishita

Yukio Nishimura

Yuichi Ogawa

A storage device, includes: a plurality of controller modules; a bus disposed among the plurality of controller modules, the bus including a plurality of transmission paths; a detector configured to detect an error in data communication through the bus; and a connection controller configured to carry out partial fallback processing of the bus if the number of the errors has exceeded a given number.

Storage device, error processing method, and communication system

A data communication control device. The data communication control device includes, a controller comprising a first data storing part, the first data storing part including multiple channels, each channel being applied to store a command for data transfer based on a destination of data, the controller executing the command stored in the channel from the head to transfer data and, an overall controller storing the command in the channel of the first data storing part when the number of commands in a certain channel is not over a upper limit, and stopping to store the command in the channel of the first data storing part and creating a second data storing part and storing the command in the second data storing part when the number of commands in a certain channel is over the upper limit.

Data communication control device

A first controller stores externally input data to a memory of the first controller, reads data stored in the memory of the first controller and transmits the data to a second controller through a first controller bridge, detects a failure at the first controller bridge in transmission of the data. The second controller receives the data through a second controller bridge, writes the received data into a memory of the second controller, and determines whether the failure is caused by the first controller if a failure occurs in the memory controller and the second controller bridge. If a failure is detected in the first controller and the second controller and the failure is caused by the first controller, the first controller transmits the data causing the failure during transmission through the first controller bridge and the second controller receives the data through the second controller bridge.

Storage apparatus and control method for storage apparatus

A multi-core processor which includes a plurality of processor dies. The multi-core processor has a first processor core which processes a first task and a second processor core which processes a second task. The first processor core and the second processor core are formed on each of the plurality of processor dies. When the first processor core makes a request for the second task processing in processing the first task, information on the second task is stored in a memory area used by the first processor core and interrupt notification is made to each of the second processor cores provided respectively on the plurality of processor dies. Each of the second processor cores having received the interrupt notification accesses the memory area used by the first processor core provided on the same processor die as the processor die on which the second processor core is provided.

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Kahoku, Japan

Satoru Nishita