Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Other

Satoru Mitani

Shunsaku Muraoka

Takeshi Takagi

Koji Katayama

Yoshihiko Kanzawa

Koichi Osano

Kazuhiko Shimakawa

Satoru Fujii

Zhiqiang Wei

Yuji Nagata

Toshio Fukazawa

Ryoko Miyanaga

Hiroyasu Tsuji

Hiroshi Seki

Kazuo Nakamura

Kumiko Wada

Hiroyoshi Sekiguchi

Terumi Yanagi

Takumi Mikawa

Hiroshi Sakakima

Koji Arita

Yoshio Kawashima

Masaya Sakaguchi

Kumio Nago

Tadashi Kimura

Koichi Kugimiya

Nobuyuki Kaminaka

Yoshihiro Tosaki

Yuuji Omata

Kiyoshi Kojima

Isao Muragishi

Akira Ahagon

Shigeru Kojima

Hiroshi Youda

Ichirou Takahashi

Hiroshi Shimamura

Yoshihiro Tozaki

Zhiquiang Wei

A method of driving a variable resistance element comprises: before a first write step is performed, applying an initial voltage pulse of a first polarity to change a resistance value of a metal oxide layer from a resistance value corresponding to an initial state of the metal oxide layer to another resistance value; wherein when the resistance value corresponding to the initial state is R, the resistance value corresponding to a write state is RL, the resistance value corresponding to an erase state is RH, another resistance value is R, a maximum value of the current flowing when the initial voltage pulse is applied is IbRL, a maximum value of the current flowing when the write voltage pulse is applied is IRL, and a maximum value of the current flowing when the erase voltage pulse is applied is IRH, R&#x3e;RH&#x3e;R&#x2267;RL, and |IRL|&#x3e;|IbRL| are satisfied.

Driving method of variable resistance element and non-volatile memory device

A method for driving a nonvolatile memory element includes: a writing step of changing a variable resistance layer to a low resistance state, by applying a writing voltage pulse having a first polarity; and an erasing step of changing the variable resistance layer to a high resistance state, by applying an erasing voltage pulse having a second polarity different from the first polarity, wherein in the writing step, a first input and output terminal of a field effect transistor is a source terminal of the transistor, and when a pulse width of the writing voltage pulse is PWLR and a pulse width of the erasing voltage pulse is PWHR, PWLR and PWHR satisfy a relationship of PWLR&#x3c;PWHR.

Method for driving nonvolatile memory element, and nonvolatile memory device having a variable resistance element

A method of driving a nonvolatile memory element including a variable resistance element having a state reversibly changing between low and high resistance states by an applied electrical signal and a transistor serially connected to the variable resistance element. The method including: setting the variable resistance element to the low resistance state by applying a first gate voltage to a gate of the transistor and applying a first write voltage negative with respect to a first electrode; and changing a resistance value of the transistor obtained in a low-resistance write operation, when a value of current passing through the variable resistance element in the setting of the low resistance state or a resistance value of the nonvolatile memory element in the case where the variable resistance element is in the low resistance state is outside a predetermined range.

Method of driving nonvolatile memory element and nonvolatile memory device

A nonvolatile memory device includes: a first electrode; a second electrode; and a variable resistance layer which includes: a first oxide layer including a first metal oxide; a second oxide layer located between and in contact with the first oxide layer and a second electrode including a second metal oxide and having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxide layer; and a local region located in the first oxide layer and the second oxide layer, having contact with the second electrode and no contact with the first electrode, and having a degree of oxygen deficiency higher than the degree of oxygen deficiency of the second oxide layer and different from the degree of oxygen deficiency of the first oxide layer.

Nonvolatile memory element and nonvolatile memory device

A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

Variable resistance element and method of manufacturing the same

A variable resistance nonvolatile memory element writing method according to the present disclosure includes: (a) changing a variable resistance layer to a low resistance state by applying, to a second electrode, a first voltage which is negative with respect to a first electrode; and (b) changing the variable resistance layer to a high resistance state. Step (b) includes: (i) applying, to the second electrode, a second voltage which is positive with respect to the first electrode; and (ii) changing the variable resistance layer to the high resistance state by applying, to the second electrode, a third voltage, which is negative with respect to the first electrode and is smaller than the absolute value of a threshold voltage for changing the variable resistance layer from the high resistance state to the low resistance state, after the positive second voltage is applied in step (i).

Variable resistance nonvolatile memory element writing method

A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate, (ii) a variable resistance element having: lower and upper electrodes; and a variable resistance layer whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes, and (iii) a MOS transistor formed on the substrate, wherein the variable resistance layer includes: oxygen-deficient transition metal oxide layers having compositions MOand MO(where x&#x3c;y) and in contact with the electrodes respectively, a diffusion layer region is connected with the lower electrode to form a memory cell, the region serving as a drain upon application of a voltage signal which causes a resistance change to high resistance state in the variable resistance layer.

Variable resistance nonvolatile storage device and method of forming memory cell

A nonvolatile memory element of the present invention comprises a first electrode (), a second electrode (); a resistance variable layer () which is interposed between the first electrode () and the second electrode () and is configured to switch a resistance value reversibly in response to an electric signal applied between the electrodes () and (), and the resistance variable layer () has at least a multi-layer structure in which a first hafnium-containing layer having a composition expressed as HfO(0.9&#x2266;x&#x2266;1.6), and a second hafnium-containing layer having a composition expressed as HfO(1.8&#x3c;y&#x3c;2.0) are stacked together.

Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor device incorporating nonvolatile memory element

A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate (), (ii) a variable resistance element () having: lower and upper electrodes (,); and a variable resistance layer () whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes (,), and (iii) a MOS transistor () formed on the substrate (), wherein the variable resistance layer () includes: oxygen-deficient transition metal oxide layers (-,-) having compositions MOand MO(where x&#x3c;y) and in contact with the electrodes (,) respectively, and a diffusion layer region () is connected with the lower electrode () to form a memory cell (), the region () serving as a drain of the transistor () upon application of a voltage signal which causes a resistance change to high resistance state in the variable resistance layer ().

The variable resistance nonvolatile storage device includes a memory cell () that is formed by connecting in series a variable resistance element () including a variable resistance layer () which reversibly changes based on electrical signals each having a different polarity and a transistor () including a semiconductor substrate () and two N-type diffusion layer regions (), wherein the variable resistance layer () includes an oxygen-deficient oxide of a transition metal, lower and upper electrodes () are made of materials of different elements, a standard electrode potential Vof the lower electrode (), a standard electrode potential Vof the upper electrode (), and a standard electrode potential Vof the transition metal satisfy V&#x3c;Vand V&#x3c;V, and the lower electrode () is connected with the N-type diffusion layer region (), the electrical signals being applied between the lower and upper electrodes ().

Variable resistance nonvolatile storage device with oxygen-deficient oxide layer and asymmetric substrate bias effect

A nonvolatile memory element includes first and second electrodes, and a resistance variable layer disposed therebetween. At least one of the first and second electrodes includes a platinum-containing layer. The resistance variable layer includes a first oxygen-deficient transition metal oxide layer which is not physically in contact with the platinum-containing layer and a second oxygen-deficient transition metal oxide layer which is disposed between the first oxygen-deficient transition metal oxide layer and the platinum-containing layer and is physically in contact with the platinum-containing layer. When oxygen-deficient transition metal oxides included in the first and second oxygen-deficient transition metal oxide layers are expressed as MO, and MO, respectively, x&#x3c;y is satisfied. The platinum-containing layer has a thickness which is not less than 1 nm and not more than 23 nm.

Nonvolatile memory element having a thin platinum containing electrode

A nonvolatile memory element comprises a first electrode layer (), a second electrode (), and a resistance variable layer () which is disposed between the first electrode layer () and the second electrode layer (), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (), (), wherein the resistance variable layer () has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0&#x3c;x&#x3c;2.5) and a second region comprising a second oxygen-deficient tantalum oxide having a composition represented by TaOy (x&#x3c;y&#x3c;2.5), the first region and the second region being arranged in a thickness direction of the resistance variable layer.

Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor apparatus using the nonvolatile memory element

A nonvolatile memory element comprises a first electrode (); a second electrode (); and a resistance variable layer () disposed between the first electrode () and the second electrode (), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (); the resistance variable layer () including a first tantalum oxide layer () comprising a first tantalum oxide and a second tantalum oxide layer () comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0&#x3c;x&#x3c;2.5 is satisfied when the first tantalum oxide is expressed as TaOand x&#x3c;y&#x2266;2.5 is satisfied when the second tantalum oxide is expressed as TaO; and the second electrode () being in contact with the second tantalum oxide layer () and comprising platinum and tantalum.

Nonvolatile memory element, nonvolatile memory device, nonvolatile semiconductor device, and method of manufacturing nonvolatile memory element

A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R&#x3e;RH&#x3e;RL and |V|&#x3e;|Ve|&#x2267;|Vw| are satisfied where R, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.

Method of programming variable resistance element and nonvolatile storage device

A method of driving a variable resistance element includes: a writing step performed by applying a writing voltage pulse having a first polarity to a variable resistance layer to change a resistance state of the layer from high to low; and an erasing step performed by applying an erasing voltage pulse having a second polarity to the layer to change the state from low to high. Here, |Vw|&#x3e;|Vw| where Vwrepresents a voltage value of the writing voltage pulse for first to N-th writing steps (N&#x2267;1) and Vwrepresents a voltage value of the writing voltage pulse for (N+1)-th and subsequent writing steps, and |Ve|&#x3e;|Ve| where Verepresents a voltage value of the erasing voltage pulse for first to M-th erasing steps (M&#x2267;1) and Verepresents a voltage value of the erasing voltage pulse for (M+1)-th and subsequent erasing steps. The (N+1)-th writing step follows the M-th erasing step.

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Osaka, Japan

Satoru Mitani