Renesas Electronics Corporation

Renesas Technology Corp.

Satoru Machida

Yasushi Ishii

Munekatsu Nakagawa

Toshikazu Matsui

Takashi Hashimoto

Yoshiyuki Kawashima

Koichi Toba

Takeshi Sakai

Tsutomu Okazaki

Kentaro Saito

Kyoya Nitta

Masaru Nakamichi

Yuichi Tsukada

Kozo Katayama

Kosuke Okuyama

Masato Takahashi

Toshio Kudo

Yukihiro Suzuki

A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating film for charge storage. A first side wall is formed on a side face of the memory gate electrode, and at a side face of the first side wall, a second side wall is formed. On an upper surface of an n-type semiconductor region for source in the memory cell there is formed a silicide layer whose end portion on the memory gate electrode MG side is defined by the second side wall.

Semiconductor device having split gate type, non-volatile memory cells and a method of manufacturing the same

Provided is a semiconductor device having, over a semiconductor substrate, a control gate electrode and a memory gate electrode which are adjacent to each other and constitute a nonvolatile memory. The height of the memory gate electrode is lower than the height of the control gate electrode. A metal silicide film is formed over the upper surface of the control gate electrode, but not formed over the upper surface of the memory gate electrode. The memory gate electrode has, over the upper surface thereof, a sidewall insulating film made of silicon oxide. This sidewall insulating film is formed in the same step as that for the formation of respective sidewall insulating films over the sidewalls of the memory gate electrode and the control gate electrode. The present invention makes it possible to improve the production yield and performance of the semiconductor device having a nonvolatile memory.

Semiconductor device and a method of manufacturing the same

For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.

Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device

In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrodeof the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrodeare formed in a multilayer structure including an electrode material filmA and an electrode material layerB, and the gate electrodeis a single layer structure formed at the same time as the electrode material filmA of the control gate.

A memory cell has a control gate electrode disposed on a main surface of a semiconductor substrate through a gate insulating film, an ONO film disposed along a side surface of the control gate electrode and the main surface of semiconductor substrate, a memory gate electrode disposed on a side surface of the control gate electrode and also on the main surface of the semiconductor substrate through the ONO film. The control gate electrode and the memory gate electrode are formed, over the upper portions thereof, with a silicide film and an insulating film formed by oxidation of the surface of the silicide film, respectively.

Growing community of inventors

Tokyo, Japan

Satoru Machida