Dai Nippon Printing Co., Ltd.

Dai Nippon Insatsu Kabushiki Kaisha

Dai Nippon Printingco., Ltd.

Satoru Kuramochi

Yozo Kosaka

Hidenori Yoshioka

Sumio Koiwa

Yasunori Kurima

Masayuki Iijima

Takamasa Takano

Koichi Nakayama

Nobuaki Kimura

Sakurako Hatori

Kazunori Nakamura

Toshiaki Mori

Miyuki Akazawa

Yoshitaka Fukuoka

Masaaki Asano

Takeshi Nakamura

Noritaka N Egashira

Eiichi Inoue

Minoru Utsumi

Mitsuru Takeda

Hitoshi Fujii

Katsuhiko Mizuno

Yoshiko Fujita

A through electrode substrate includes a substrate having a through hole extending through between a first face and a second face, a diameter of the through hole not having a minimum value inside the through hole; and a conductor arranged inside the through hole, wherein the through hole has a shape having a value obtained by summing a first to an eighth inclination angle at a first to an eighth position, respectively, of an inner face of the through hole of 8.0° or more, each of the first to the eighth inclination angle is an angle of the inner face with respect to a center axis of the through hole, and the first to the eighth position correspond to positions at distances of 6.25%, 18.75%, 31.25%, 43.75%, 56.25%, 68.75%, 81.25%, and 93.75%, respectively, from the first face in a section from the first face to the second face.

Through electrode substrate and semiconductor device

A through electrode substrate includes: a substrate having a first surface and a second surface facing the first surface; through electrodes penetrating through the substrate; and a first capacitor including a first conductive layer, an insulating layer, and a second conductive layer, arranged on the first surface side of the substrate, and electrically connected with at least one of the through electrodes. The first conductive layer is arranged on the first surface side of the substrate and is electrically connected with the through electrode. The insulating layer includes a first part and a second part and is arranged on the first conductive layer. The second conductive layer is arranged on the insulating layer. The first part is arranged between the first conductive layer and the second conductive layer. The second part covers at least a part of a side surface of the first conductive layer.

A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

Through-hole electrode substrate

A through electrode substrate includes a substrate having a through hole extending through between a first face and a second face, a diameter of the through hole not having a minimum value inside the through hole; and a conductor arranged inside the through hole, wherein the through hole has a shape having a value obtained by summing a first to an eighth inclination angle at a first to an eighth position, respectively, of an inner face of the through hole of 8.0&#xb0; or more, each of the first to the eighth inclination angle is an angle of the inner face with respect to a center axis of the through hole, and the first to the eighth position correspond to positions at distances of 6.25%, 18.75%, 31.25%, 43.75%, 56.25%, 68.75%, 81.25%, and 93.75%, respectively, from the first face in a section from the first face to the second face.

A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture 5 being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planar view is smallest among a plurality of areas of the through-hole in a planar view, a filler arranged within the 10 through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

Through-hole electrode substrate and semiconductor device using through-hole electrode substrate

An object is to provide an electronic device of a multilayer structure with high density and high reliability that can be reduced in size while incorporating an electronic component therein, and further provide a production method for easily producing such an electronic device. An electronic device of the present invention includes wiring layers and electrically insulating layers stacked on a core board and establishes predetermined electrical conduction between the wiring layers through upper-lower side conducting vias provided in the electrically insulating layers. An electronic component incorporating layer formed by directly forming a lower layer and insulating resin layer having a cutout portion for receiving an electronic component therein and upper-lower side conducting vias and by incorporating the electronic component in the cutout portion is provided at least between one of the wiring layers and one of the electrically insulating layers and/or between the core board and the electrically insulating layer. At least the uppermost-layer electronic component incorporating layer of electronic incorporating layers has a metal frame body surrounding the electronic component and the upper-lower side conducting vias, and a metal cap having a flange portion fixed to the metal frame body of the uppermost-layer electronic component incorporating layer is provided.

Electronic device and production method thereof

A manufacturing method of a multilayer wiring board that includes a core board, a wiring layer, and an electrically insulating layer that are stacked on the core board. The manufacturing method forms a plurality of through holes in a core member, a thermal expansion coefficient of the core board being between 2 to 20 ppm, and the core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal. The through holes are made conductive by a conductive material, to electrically connect between the front and the back of the core board. A wiring layer and an electrically insulating layer are stacked on one surface of the core board to form a multilayer wiring layer. A capacitor is formed on the other surface of the core board.

Method of manufacturing multilayer wiring board

An object is to provide an electronic device of a multilayer structure with high density and high reliability that can be reduced in size while incorporating an electronic component therein, and further provide a production method for easily producing such an electronic device. An electronic device of the present invention includes wiring layers and electrically insulating layers stacked on a core board and establishes predetermined electrical conduction between the wiring layers through upper-lower side conducting vias provided in the electrically insulating layers. An electronic component incorporating layer formed by directly forming on a lower layer an insulating resin layer having a cutout portion for receiving an electronic component therein and upper-lower side conducting vias and by incorporating the electronic component in the cutout portion is provided at least between one of the wiring layers and one of the electrically insulating layers and/or between the core board and the electrically insulating layer. At least the uppermost-layer electronic component incorporating layer of electronic component incorporating layers has a metal frame body surrounding the electronic component and the upper-lower side conducting vias, and a metal cap having a flange portion fixed to the metal frame body of the uppermost-layer electronic component incorporating layer is provided.

In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

Growing community of inventors

Tokyo, Japan

Satoru Kuramochi