University of Florida Research Foundation, Incorporated

Saranyu Chattopadhyay

Swarup Bhunia

Prabuddha Chakraborty

Abdulrahman Alaql

Embodiments of the present disclosure provide methods, apparatus, systems, computer program products, computing devices, and/or computing entities for obfuscating a hardware intellectual property (IP) design by locking the design based at least in part on a plurality of key-bits. In one embodiment, a method is provided comprising: generating a key vulnerability matrix for a locked version of the design and a plurality of attacks that comprises for each attack, a vector comprising a value for each key-bit identifying whether the attack successfully extracted a correct key value for the key-bit; and for each key-bit: determining whether the key-bit is vulnerable to an attack based on the values in the matrix; and responsive to being vulnerable: identifying a set of solutions to mitigate the attack; selecting a solution from the set; and inserting a key-gate type for the key-bit at a location identified by the selected solution into the design.

Growing community of inventors

Gainesville, FL, United States of America

Saranyu Chattopadhyay