Intel Corporation

Lg Electronics Inc.

Seoul National University

Industry-University Cooperation Foundation Hanyang University

Sarah Eunkyung Kim

Patrick R Morrow

Shriram Ramanathan

Youngdo Cha

Dongwon Han

Sunglyong Cha

Minbok Lee

Sunyong Lee

Tae Hyeob Im

In order to minimize an increase in a bezel of a mobile terminal, provided is a mobile terminal comprising: a display panel; a window coupled to the front surface of the display panel so as to cover the front surface of the display panel; and a seating frame in which the display panel is mounted, wherein the seating frame comprises: a panel seating portion in which at least one region of the display panel is seated; a window seating portion which receives an edge region of the rear surface of the window and forms a large separation space from the rear surface of the window inward; and a sidewall portion forming a sidewall connecting the window seating portion and the panel seating portion, wherein the sidewall portion is recessed outward in a region corresponding to a side portion of the display panel.

Mobile terminal

A method for manufacturing a semiconductor device package may comprise providing a semiconductor device, preparing a thermal interface layer on the semiconductor device, and disposing a heat spreader on the thermal interface layer, wherein the thermal interface layer comprises a core shell composite containing a metal core and a carbon shell surrounding the metal core.

Semiconductor device package comprising thermal interface layer and method of fabricating of the same

Backside connections for 3D integrated circuits and methods to fabricate thereof are described. A stack of a first wafer over a second wafer that has a substrate of the first wafer on top of the stack, is formed. The substrate of the first wafer is thinned. A first dielectric layer is deposited on the thinned substrate. First vias extending through the substrate to the first wafer are formed in the first dielectric layer. A conductive layer is deposited in the first vias and on the first dielectric layer to form thick conductive lines. Second dielectric layer is formed on the conductive layer. Second vias extending to the conductive lines are formed in the second dielectric layer. Conductive bumps extending into the second vias and offsetting the first vias are formed on the second dielectric layer.

3D integrated circuits using thick metal for backside connections and offset bumps

Growing community of inventors

Seoul, South Korea

Sarah Eunkyung Kim