Broadcom Corporation

Santosh Savekar

Moovaraivendren Subramanian

Sandeep Bhatia

Gaurav Aggarwal

Satheesh Babu

K Shivapirakasan

Arun Gopalakrishna Rao

Sunoj Koshy

Srinivasa Reddy

Subramanian Kuppuswamy

Shivapirakasan Kanakaraj

Gaurav Agrawal

Mk Subramanian

M K Subramanian

Described herein is a system and method for audio visual synchronization. The picture are displayed by receiving an identifier, said identifier associated with a frame buffer storing a picture; extracting a presentation time stamp associated with the picture, wherein the picture is associated with a time stamp; comparing a local time clock value to the presentation time stamp; determining that the picture is mature for presentation if the presentation time stamp exceeds the local time clock value by less than a first predetermined threshold; and determining that the picture is mature for presentation if the local time clock value exceeds the presentation time stamp by less than a second predetermined threshold.

System and method for audio/video synchronization

A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.

System, method, and apparatus for display manager

A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory can be off-chip.

Video display and decode utilizing off-chip processor and DRAM

Disclosed are various embodiments for displaying pictures at high speed. In one embodiment, a system includes a buffer for storing parameters associated with a predetermined number of the pictures during a video display period. The system further includes a video decoder for decoding particular ones of the predetermined number of the pictures. The predetermined ones are either reference pictures or pictures that are to be displayed at high speed. The pictures that are displayed in high speed at each display interval have a constant time-lapse between the pictures that are displayed in high speed at the next display interval.

High speed for digital video

Buffer descriptor structures for communication between decoder and display manager

A system, method, and apparatus for providing display parameters from the decode process to the display process are presented herein. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images as well as the parameters and stores each image in a separate image buffer. Additionally, the decode process stores the parameters which facilitate the display process in a buffer descriptor structure associated with the image buffer. The display process uses the parameters stored in the buffer descriptor structure during the display process.

Buffer descriptor data structure for communication link between decode and display processes in MPEG decoders

Disclosed herein are debugging tool(s) for profiling the frequency of execution of certain instructions in a host operation. The debugging tool causes interrupts to occur at random time intervals and records the address of the program counter at each interrupt. A profile is developed that indicates the frequency of execution of certain instructions after a statistically significant number of interrupts.

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Bengaluru, India

Santosh Savekar