Cypress Semiconductor Corporation

Santosh Kulkarni

Arun Khamesra

Partha Mondal

A flyback-converter with synchronous-rectifier (SR) sense architecture is provided. A secondary side controller includes a SR-sense pin coupled through an external resistor to a drain of an SR on the secondary-side, a negative-sensing-detector, a peak-detector, a zero-crossing-detector, all coupled to the pin, and a resistor network (Rn) coupled between the pin and ground. The Rn includes a first resistor (R) to couple the pin and to ground through a first switch (S) during negative-sensing to divide a voltage (V) coupled to the pin, and a second, higher resistance resistor (R) to couple the pin to ground through a second switch (S) during peak-detection to divide Vcoupled to the pin. Sand Sare controlled by register-transfer-level circuit in the SSC. A line-feed-forward (LFF) circuit is coupled to the pin through an active diode to receive an undivided Vand mirrors diode current to control the converter in LFF mode.

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Dharwad, India

Santosh Kulkarni