Intel Corporation

Santosh Balakrishnan

Venkatraman Ramakrishna

Hormuzd M Khosravi

Sanjay Bakshi

Charles E Narad

Manasi Deval

Raj S Yavatkar

Neelam Chandwani

Chetan Hiremath

Rakesh Dodeja

Suhail Ahmed

Udayan Mukheriee

Methods and apparatus for performing content inspection using multi-pattern packet content inspection mechanisms employing tagged values. Pattern data structures are employed to facilitate multi-pattern searches via corresponding string-search algorithm machines. The pattern data structures include tagged values defining search offsets and depths for corresponding search patterns. Incoming packets are classified to flows, and stored in corresponding flow queues. Flow table entries are used to identify the pattern data structure for a given flow. During content inspection, the algorithm machine employs the tagged values to effectively skip portions of a data stream up to the offset for each search pattern and to cease searching for a pattern upon reaching the depth for the pattern.

Multi-pattern packet content inspection mechanisms employing tagged values

Methods and apparatus for performing content inspection across packet boundaries using stateful packet content matching mechanisms. Pattern data structures are employed to facilitate string search algorithm machines. Incoming packets are classified to flows, and stored in corresponding flow queues. Flow table entries are used to identify the pattern data structure for a given flow. During content inspection, the algorithm machine updates state information to identify partial or full matches. When a partial match is detected towards the end of an earlier packet state information in the flow table is updated to reflect the state such that content inspection of a following packet begins at that state. As a result, content inspection across packet boundaries is supported. The techniques may further be employed in a packet processing context pipeline stage.

Stateful packet content matching mechanisms

A method to provide high availability in network elements using distributed architectures. The method employs multiple software components that are distributed across data/forwarding plane and control plane elements in a network element. The software components in the data/forwarding plane include active and standby components. Components in the control plane a re provided to communicate with the components in the data/forwarding plane. A keep-alive messaging mechanism is used to monitor operation of the various elements in the network element. Upon detection of a failure to a hardware or software component, the data/forwarding plane and/or control plane elements are reconfigured, as applicable, to replace a failed active component with a corresponding standby component. This enables the network element to be reconfigured in a manner that is transparent to other network elements, and provided high availability for the network element.

Method to provide high availability in network elements using distributed architectures

A fault module supports detection, analysis, and/or logging of various faults in a processor system. In one embodiment, the system is provided on a multi-core, single die device.

Method and apparatus to detect/manage faults in a system

Methods, software and systems of dynamically controlling push cache operations are presented. One method, which may also be implemented in software and/or hardware, monitors performance parameters and enables or disables push cache operations depending on whether the performance parameters are within a predetermined range. Another method, which may also be implemented in software and/or hardware, monitors an amount of credits associated with a device and enables or disables push cache operations dependent upon whether the device has sufficient remaining credits.

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Gilbert, AZ, United States of America

Santosh Balakrishnan