International Business Machines Corporation

Santo Credendino

Anthony K Stamper

Robert K Leidy

Bruce Walter Porth

Paul William Pastel

Michael D Hulvey

Jothimalar Kuppusamy

Timothy J Wiltshire

A method of for compensating for variations in structures of an integrated circuit. The method includes (a) selecting a mask design shape and selecting a region of the mask design shape; (b) applying a model-based optical proximity correction to all of the mask design shape; and after (b), (c) applying a rules-based optical proximity correction to the selected region of the mask design shape.

Method for compensating for variations in structures of an integrated circuit

The present invention relates generally to the field of semiconductor device manufacturing, and more specifically to a method for aligning a projected photolithography mask pattern image with respect to the underlying device layer. The method involves measuring the overlay error between product features in the projected layer and product features in the underlying layer, determining an adjustment factor based on these measurements, and applying this adjustment factor to the overlay error between reference features located in the kerf of the projected layer and reference features in the kerf of the underlying layer. Thus, nonzero offsets or adjustment factors for box-in-box overlay targets are entered into a stepper or scanner tool, in order to minimize within field product overlay errors.

Method of aligning lithographically printed product layers using non-zero overlay targets

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