Transwitch Corporation

Santanu Bhattacharya

William G Bartholomay

Pushkal Yadav

Balaraj Vishnu Varthanan

Suvhasis Mukhopadhyay

Diljit Singh

Yudhishthira Kundu

Neeraj Gupta

Vivek Gupta

Yogesh Mittal

Priya Darshini

Arunava Dutta

Jitender Kaul

An apparatus for implementing VCAT in both SDH and PDH signals includes an SDH VCAT mapper coupled to a first telecom bus and a plurality of PDH units coupled to the first telecom bus and a second telecom bus. The PDH units read SDH VCAT bytes from the first telecom bus and write PDH VCAT bytes to the second telecom bus according to a gapped clock. At the data sink RS-Ack is determined before deskewing and is latched to be reported after deskewing. During deskewing, less than the maximum delay between members is tracked, thereby using less storage. Addressing of the deskewing storage is computed using a remainder algorithm.

Efficient scalable implementation of VCAT/LCAS for SDH and PDH signals

Methods for correcting errors in a GFP-T superblock include buffering the 64 bytes of data in an 8&#xd7;8 byte buffer, buffering the flag byte in a separate buffer, calculating the CRC remainder, and performing single and double bit error correction in three stages. In the first stage, the CRC remainder is compared to a single bit error syndrome table and if an error is located, it is corrected. In the second stage, the CRC remainder is compared to a double bit error syndrome table and if an error is located, it is corrected. The third stage corrects the second error of a double bit error. The flag byte is processed first, followed by the data bytes, eight bytes at a time.

Methods and apparatus for error correction of transparent GFP (Generic Framing Procedure) superblocks

An apparatus for handling back-to-back maintenance messages in extended superframe t telephone circuits includes a FIFO, a byte counter, and a message length register. According toga method of the invention, when messages are placed in the. FIFO, the byte counter counts the message length and places the message length in the message length register. A host controller is required to read the message length register in the time interval following complete receipt of a first message before complete receipt of a second message, but is only required to read the contents of the FIFO before it overflows. According to a presently preferred embodiment of the apparatus, a second register is provided for indicating the current depth of the FIFO. The second register sends an interrupt to the host controller when the contents of the FIFO exceed a threshold.

Methods and apparatus for handling maintenance messages in extended superframe T1 telephone circuits

A method and apparatus for reliably detecting both AIS and AIS-CI signals in the presence of a bit error ratio up to 1&times;10 includes an AIS detector having an AIS indication output, a CI detector having a CI indication output, and a two signal AND gate having its inputs coupled to the respective outputs of the detectors and having an output indicative of an AIS-CI detection. The AIS detector has an adjustable zero threshold and the CI detector has a threshold output coupled to the AIS detector for adjusting the zero threshold. According to the method of the invention, the AIS detector zero threshold is normally set at the normal threshold (1&times;10 ) but is reset to a higher threshold (e.g., 2&times;10 ) when the CI detector detects the presence of the CI code word. The AIS signal is detected in a normal way and the AIS-CI signal is detected only when the CI detector detects the presence of the CI code word AND the AIS detector detects the presence of the AIS signal using the higher zero threshold. According to a preferred embodiment, the zero threshold is raised if the CI detector detects two consecutive CI code words, but the CI indication output is indicated only of the CI detector detects eight CI code words in 40 ms. The zero threshold is returned to normal when the CI detector detects ten consecutive absences of the CI code word.

Alarm indication signal detection in the presence of special line codes in DS1 (T1) telephone circuits

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Delhi, India

Santanu Bhattacharya