Intel Corporation

Analog Devices,inc.

Altera Corporation

Intel IP Corporation

Sankaran M Menon

Martin Langhammer

Rolf H Kuehnis

Vasudev Bibikar

Patrik Eder

Ramana V Rachakonda

Jinshi Huang

Bradley H Smith

Naveendran Balasingam

P Reddy Sahajananda

Sunghyun Koh

Juan Guillermo Revilla

Lance E Hacking

Thomas Tomazin

Luis Antonio Basto

Sridhar Valluru

Tien Dinh

Robert R Roeder

Babu Trp

Andrew Martyn Draper

Karunakara Kotary

Larry Edward Thatcher

Sanjoy K Mondal

Ting Lu

Rajendra S Yavatkar

Abram M Detofsky

Vui Yong Liew

Krishna Kumar Ganesan

Nancy G Woodbridge

Binta M Patel

Bo Jiang

Keith A Jones

Eric L Hendrickson

Rob W Sims

Liwei Ju

Mustansir Fanaswalla

Rehan M Sheikh

John Michael Peterson

Sabar Mourad Souag

Victor Ruybalid

Noel Eck

Eija Maarit Hillevi Manninen

William Hodges

Kuldeep Simha

Asifur Rahman

Mohsen Fazlian

Kristan K Wiseley

Wai Mun Ng

Subinlal Pk

Thomas A Lyda

Wei Chun Lau

Kenneth Chen

Eyal Dolev

Jeremy Conner

An integrated circuit (IC) device configured for multiple return material authorizations (RMAs) is provided. The IC device includes an asset and a return material authorization (RMA) counter fuse including a first fuse, a second fuse, and a third fuse. The IC device enters an RMA state in response to blowing the first fuse, a second state in response to blowing the second fuse, and the RMA state in response to blowing the third fuse.

Method and apparatus for enabling multiple return material authorizations (RMAs) on an integrated circuit device

An Automated Dynamic low voltage monitoring (LVM) based Low-Power (ADLLP) debug capability for a system-on-chip (SoC) as well as the open/closed-chassis platform for faster TTM (Time to Market) of the final platform or system. ADLLP Debug is achieved by detection of the probe connection between a target system (e.g., SoC) and debug host system. A user can dynamically override the power, clocks and LVM for intellectual property (IP) blocks not part of the debug trace by instructing a Power Management Controller (PMC) via the Inter Processor Communication (IPC) mailbox (or any other suitable mailbox driver) to set the registers in a Target Firmware (TFW) based on the probe and debug use-case.

Techniques to enable integrated circuit debug across low power states

Existing multi-wire debugging protocols, such as 4-wire JTAG, 2-wire cJTAG, or ARM SWD, are run through a serial wireless link by providing the debugger and the target device with hardware interfaces that include UARTs and conversion bridges. The debugger interface serializes outgoing control signals and de-serializes returning data. The target interface de-serializes incoming control signals and serializes outgoing data. The actions of the interfaces are transparent to the inner workings of the devices, allowing re-use of existing debugging software. Compression, signal combining, and other optional enhancements increase debugging speed and flexibility while wirelessly accessing target devices that may be too small, too difficult to reach, or too seal-dependent for a wired connection.

Interfaces for wireless debugging

Techniques and mechanisms to exchange test, debug or trace (TDT) information via a general purpose input/output (I/O) interface. In an embodiment, an I/O interface of a device is coupled to an external TDT unit, wherein the I/O interface is compatible with an interconnect standard that supports communication of data other than any test information, debug information or trace information. One or more circuit components reside on the device or are otherwise coupled to the external TDT unit via the I/O interface. Information exchanged via the I/O interface is generated by, or results in, the performance of one or more TDT operations to evaluate the one or more circuit components. In another embodiment, the glue logic of the device interfaces the I/O interface with a test access point that is coupled between the one or more circuit components and the I/O interface.

Device, system and method to support communication of test, debug or trace information with an external input/output interface

Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.

Apparatus and method to debug a voltage regulator

Technologies for efficiently providing reliable compute operations for mission critical applications include a reliability management system. The reliability management system includes circuitry configured to obtain conclusion data indicative of a conclusion made by each of two or fewer compute devices of a host system. The conclusion data from each compute device pertains to the same operation. Additionally, the circuitry is configured to identify whether an error has occurred in the operation of each compute device, determine, in response to a determination that an error has occurred, a severity of the error, and cause the host system to perform a responsive action as a function of the determined severity of the error.

Technologies for efficient reliable compute operations for mission critical applications

In one embodiment, an apparatus includes a controller to couple between a system on chip (SoC) and an external connector of a platform. The controller may include: a digitizer to digitize platform telemetry information of the platform; and a control circuit to receive a command from a debug test system and direct the platform telemetry information to a destination in response to the command. Other embodiments are described and claimed.

System, apparatus and method for non-intrusive platform telemetry reporting using an all-in-one connector

Techniques and apparatus for error and performance analysis of a computing device are described. In one embodiment, for example, an apparatus may include at least one memory and logic coupled to the at least one memory, wherein the logic is further to access at least one trace associated with at least one trace source, access timing information associated with the at least one trace, generate a plurality of waypoints for at least one trace, each of the plurality of waypoints comprising a step of at least one trace and a time stamp, and generate at least one performance benchmark log for the at least one trace, the at least one benchmark log comprising a plurality of benchmark waypoints corresponding to the plurality of waypoints.

Techniques for monitoring errors and system performance using debug trace information

The disclosed systems, devices, and methods may provide for wireless testing of devices and, in particular, wireless testing of semiconductor devices comprising integrated circuits, memory, and logic circuitry that can be present on a wafer. The semiconductor devices can be tested for functional defects by applying one or more test patterns to the semiconductor devices. Further, for devices under test that do not have built-in wireless connectivity (for example, those that do not have a built-in Bluetooth low-energy engine), the disclosure describes systems and methods that the devices under test can use for external wireless connectivity (e.g., an external board having Bluetooth low-energy) on the low-bandwidth interface. In one example embodiment, for high-bandwidth scan testing, wireless connectivity modules (such as those implementing WiFi or WiGig) are described, which can be used to meet the bandwidth requirements of the one or more tests.

Systems and methods for wireless device testing

A method and apparatus (e.g., semiconductor device) for setting voltages (e.g., guardbands) using 'in situ,' or on-die, silicon measurements are described. In one embodiment the semiconductor device comprises: a process monitor to measure silicon parameters of the semiconductor device; and a controller coupled to the process monitor to set a voltage for use on at least a portion of the semiconductor device based on silicon process monitor measurements.

Method and apparatus for enhancing guardbands using 'in-situ' silicon measurements

Growing community of inventors

Austin, TX, United States of America

Sankaran M Menon