Intel Corporation

Texas Instruments Corporation

Sanjib Basu

Prakash K Radhakrishnan

Sunil Kumar C R

Aruna Kumar L S

Visvesvaraya Appala Pentakota

Nagarajan Viswanathan

Pravas Pradhan

Anoop Karunan

Sathyanarayanan Gopal

Embodiments include systems, devices, and methods for a combination CPHY/DPHY/eDP display transmission PHY. A CDE can include a MIPI display serial interface (DSI) circuitry configured to receive 8 bit data compliant with a DSI protocol and output a differential pair signal to a PISO circuit. The same data path is configured for incoming eDP data, which can be routed to circuitry configured to receive 10 bit data compliant with an eDP protocol and output a differential pair signal to a PISO circuit. The system can include a CPHY circuitry that includes a mapper circuit to map a 16 bit input to a 21 bit output, mapper circuit having three 7 bit outputs, and CPHY logic to output a trio. The MUX coupled to an output of the PISO is configured to output one of the eDP or the DSI or the CPHY data to an display driver.

Combination circuitry for multiple embedded display transmission protocols

An integrated circuit is described. The integrated circuit includes a display controller having a driver. The display controller is configurable to select two or more display interfaces. The driver is designed to drive respective signals for the two or more display interfaces through a single output.

EDP MIPI DSI combination architecture

By partitioning the source PHY of a physical layer interface, such as a DisplayPort interface, between multiple power domains, dynamic switching between various power modes with faster entry and exit latency can be achieved in some embodiments. In some embodiments, the scheme may be hardware initiated and autonomous in nature. A controller can switch the PHY in and out of the various power consumption modes, dependent on usage scenarios.

Power management for a physical layer interface connecting a display panel to a display transmit engine

The strength of the output buffer is changed gradually when there is a transition in the output (or input) value. Due to the gradual change, switching noise is avoided in several contexts (e.g., when driving a transmission line, which causes reflections). In an embodiment, the gradual change is implemented using a combination of a current source and a capacitor. The capacitor is provided at an input of the gate terminal of a drive transistor, and a current source is used to control the rate at which the capacitor discharges. As a result, the drive strength of a buffer is controlled.

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Bengaluru, India

Sanjib Basu