Intel Corporation

Sk Hynix Nand Product Solutions Corp.

Other

Sanjeev N Trika

Jawad Basit Khan

Peng T Li

Robert J Royer, Jr

Anand S Ramalingam

Piotr Wysocki

Richard Paul Mangold

Robert W Faber

Jeanna N Matthews

Kapil Karkra

Bishwajit Dutta

Jackson Ellis

Knut Stener Grimsrud

Myron Loewen

Jonathan M Hughes

Michael K Eschmann

Benjamin Walker

Rowel S Garcia

Richard L Coulson

Vasudevan Srinivasan

Rick Coulson

Peng Li

James R Harris

William K Lui

Vinodh Gopal

Kshitij Arun Doshi

Ravi L Sahita

John I Garney

Steven C Miller

Wei Wu

Frank T Hady

Ziye Yang

Xiaoning Li

Gang Cao

Debra Hensgen

Xiaodong Liu

Bryan E Veal

Mariusz Barczak

Changpeng Liu

James A Boyd

Han Chau

Jason B Akers

Prasun Ratn

Scott Burridge

Qihua Dai

Benjamin Boyer

Nathaniel G Burke

Suhas Nayak

Pallav H Gala

Gregory Tucker

Glenn J Hinton

Omesh Tickoo

Vadim Sukhomlinov

Andrew W Vogan

Slawomir Putyrski

Paritosh Saxena

Nicholas D Triantafillou

Amber D Huffman

Adrian R Pearson

Faraz A Siddiqi

Annie Foong

Michael Mesnier

Yi Zou

Paul J Thadikaran

Dale J Juenemann

James P Freyensee

Karthikeyan Vaidyanathan

August A Camber

Akshay Ramesh Kadam

Oliver A Heim

Mark E Scott-Nash

Thomas J Barnes

Jason R Cox

Oscar P Pinto

Sridharan Sakthivelu

Gregory B Tucker

Dan J Williams

Michal Wysoczanski

Slawomir Ptak

John W Carroll

Brennan A Watt

Scott R Tetrick

Divya Narayanan

Rick Mangold

Charles M Forest

Michael Johnston

William Chiu

Madhurima Ray

James Guilmart

David C Estrada

Jonathan Bryan Stern

Gavin F Paes

Rajib Ghosal

Systems, apparatuses and methods may provide for memory controller technology that detects an application function, a data specifier associated with the application function, and one or more operating parameters associated with the application function, generates execution estimates for a plurality of computational storage devices based on the application function, the data specifier, the operating parameter(s), and one or more device capabilities associated with the plurality of computational storage devices, and selects a target storage device from the plurality of storage devices based on the execution estimates.

Automatic selection of computational non-volatile memory targets

An embodiment of an electronic apparatus may comprise a processor, memory communicatively coupled to the processor, and circuitry communicatively coupled to the processor and the memory to determine a group of available types of persistent memory devices and a set of characteristics associated with each type of persistent memory device of the group of available types of persistent memory devices, determine of a set of requirements for a storage system, and determine a deployment configuration for the storage system with a lowest storage acquisition cost based on the group of available types of persistent memory devices, the sets of characteristics, and the set of requirements. Other embodiments are disclosed and claimed.

Multiple tier storage deployment management engine

Systems and methods for a controller including controller memory and logic are presented herein. The logic is configured to control access to a persistent storage media and, in response to one or more commands, determine an intermediate parity value based on a first parity calculation by sending a uni-directional command to the persistent storage media. The logic is further configured to store, in the controller memory, the intermediate parity value, and determine a final parity value based on the intermediate parity value and a second parity calculation.

ON-SSD erasure coding with uni-directional commands

On-SSD-copy using Copy-On-Write (COW) techniques track indirection updates to the copied data without duplicating the data. In one example, a method involves receiving a copy command to copy data from a source LBA to a destination LBA. An entry in a logical-to-physical (L2P) table corresponding to the destination LBA is updated to refer to the same physical address as the source LBA's entry in the L2P table. Flags in the L2P table are updated to indicate that more than one LBA refers to the same physical address. After updating the L2P table and before copying the data, a token is stored to the storage device. After storing the token, but before copying the data, an acknowledgement can be sent to the host to indicate the copy command is complete. A subsequent write to either the source or destination LBAs trigger a copy of the data.

On-SSD-copy techniques using copy-on-write

An apparatus comprises a controller comprising an interface comprising circuitry to communicate with a host computing device; and a relocation manager comprising circuitry, the relocation manager to provide, for the host computing device, an identification of a plurality of data blocks to be relocated within a non-volatile memory; and relocate at least a subset of the plurality of data blocks in accordance with a directive provided by the host computing device in response to the identification of the plurality of data blocks to be relocated.

Communication of data relocation information by storage device to host to improve system performance

Read Quality of Service in a solid state drive is improved by allowing a host system communicatively coupled to the solid state drive to control garbage collection in the solid state drive. Through the use of controlled garbage collection, the host system can control when to start and stop garbage collection in the solid state drive and the number of NAND dies engaged in garbage-collection operations.

Host controlled garbage collection in a solid state drive

An embodiment of an electronic apparatus may comprise one or more substrates, and circuitry coupled to the one or more substrates, the circuitry to track transactions that access a first memory level of a multi-level memory, control access to at least the first memory level of the multi-level memory, and control a roll back of at least the first memory level of the multi-level memory based on the tracked transactions. In another embodiment, the circuitry is to control a roll back of a multi-level memory in response to a request to roll back the multi-level memory. Other embodiments are disclosed and claimed.

Data rollback for tiered memory and storage

An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to control access to a primary persistent storage with a first type of media and a nonvolatile memory buffer with a second type of media that is different from the first type of media, store metadata for incoming write data in the nonvolatile memory buffer, store other data for the incoming write data in the primary persistent storage, and provide both runtime and power-fail write atomicity for the incoming write data. Other embodiments are disclosed and claimed.

SSD managed host write atomicity with arbitrary transfer length

Systems, apparatuses and methods may provide for technology that detects, via a processor external to a solid state drive (SSD), internal information associated with the SSD, detects background operations with respect to the SSD based on the internal information, wherein the background operations include one or more of current operations or predicted operations, and adjusts a hierarchical data placement policy based on the background operations.

Disk caching and/or tiering with device internal busy information

An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to maintain a respective lookup table for each of two or more persistent storage devices in a persistent memory outside of the two or more persistent storage devices with a first indirection granularity that is smaller than a second indirection granularity of each of the two or more persistent storage devices, buffer write requests to the two or more persistent storage devices in the persistent memory in accordance with the respective lookup tables, and perform a sequential write from the persistent memory to a particular device of the two or more persistent storage devices when a portion of the buffer that corresponds to the particular device has an amount of data to write that corresponds to the second indirection granularity. Other embodiments are disclosed and claimed.

Controller and persistent memory shared between multiple storage devices

An embodiment of an electronic storage system includes one or more storage drives, at least one or more of the storage drives supporting erasure coding (EC); and a controller including logic to control local access to the one or more storage drives. The controller, in response to a write command, is to for one or more storage drives, allocate an intermediate buffer in the storage drive's non-volatile memory (NVM) to store intermediate data. The controller is to issue commands to a first storage drive to read old data, compute the intermediate data of the first storage drive as XOR of the old data and new data received in the write command, and atomically write the intermediate data of the first storage drive to the intermediate buffer of the first storage drive and write the new data to the first storage drive's NVM. The controller is to read the intermediate data of the first storage drive from the intermediate buffer of the first storage drive. The controller is further to issue commands to one or more EC storage drives to read the old data, compute result data as the old data XOR a galois field coefficient of the one or more EC storage drives multiplied by the intermediate data, and atomically write the old data to the intermediate buffer of the one or more EC storage drives and write the result data to the one or more EC storage drive's NVM. Other embodiments are disclosed and claimed.

Erasure coding write hole closure for solid-state drive (SSD) erasure coding

An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to manage access to a storage system that includes a first persistent storage device and a second persistent storage device, capture input/output telemetry for a workload on the storage system, determine one or more write reduction factors and one or more write invalidation factors for the workload based on the captured input/output telemetry, and allocate storage for the workload between the first persistent storage device and the second persistent storage device based on the one or more write reduction factors and the one or more write invalidation factors. Other embodiments are disclosed and claimed.

Endurance aware data placement in storage system with multiple types of media

An apparatus is described. The apparatus includes a mass storage device processor that is to behave as an additional general purpose processing core of a computing system that a mass storage device having the mass storage device processor is to be coupled to, wherein, the mass storage device processor is to execute out of a component of main memory within the mass storage device.

Coherent multiprocessing enabled compute in storage and memory

Systems and methods for a controller including controller memory and logic are presented herein. The logic is configured to control access to a persistent storage media and, in response to one or more commands, the logic determines an intermediate parity value based on a first parity calculation, and using the intermediate parity value determines a final parity value based on the intermediate parity value and a second parity calculation. Determining the intermediate parity value includes sending a uni-directional command to read an old data value from an address indicated in the uni-directional command, perform an exclusive-or operation on the old data value and a new data value indicated in the uni-directional command to determine the intermediate parity value and store, in the persistent storage media, the intermediate parity value at a location associated to an index indicated in the uni-directional command.

On-SSD erasure coding with uni-directional commands

Growing community of inventors

Portland, OR, United States of America

Sanjeev N Trika