Koninklijke Philips Corporation N.V.

Sanjay Manohar Bhandari

David Allouche

Ramesh Selvaraj

Patrick Leclerc

Eric Pieraerts

Joao Nuno V L Ramalho

Dennis Pu

A magnetic head reader circuit comprises a gain stage that is configured to effect multiple functions. In a preferred embodiment, the gain stage is a single stage circuit that includes programmable gain, programmable bandwidth and high-frequency boost, and squelch control. The single stage circuit also includes a folded cascode current drive that provides an increased dynamic range of the gain stage. To provide a low DC offset, the reader also includes an integrator that is operated in closed loop to appropriately attenuate the currents from the cascode current drive. By employing a multi-function single stage reader, a substantial reduction in circuit area, and a substantial increase in bandwidth, is achieved.

Optimized stage reader for low cost implementation of preamplifiers

A feedback system includes an emitter-follower as a gain stage in the forward path. The emitter-follower has a very wide band width and does not, by itself, effectively narrow the bandwidth of an information channel in which it is used. Emitter-followers are frequently used as buffers in many gain systems so using an emitter-follower which is already present effectively reduces die area for the feedback system. In an embodiment, the feedback system includes a differentiator with a programmable zero in the feedback path. The zero in the feedback path creates a pole in the forward path and the programmed location of the zero influences the pole and controls the bandwidth of the forward path. The emitter-follower also buffers the differentiator so that it does not effect the operation of any prior gain stages in which the feedback system is used. A switch in the feedback path enables the differentiator to be turned off or switched out of the loop so that the forward path is not effected when bandwidth reduction is not required. With appropriate switching, the same differentiator is used to create a zero in the forward path as well as pole in the forward path.

Read channel with programmable bandwidth control

A preamplifier for a multi-head disk drive includes a circuit that tests the connectivity of each magnetic head in the disk drive by driving each head with a small current, and detecting the flow of this current. By driving and sensing the current flowing through the magnetic heads, both open-circuit faults and bridging faults can be detected. In a preferred embodiment, each head is tested sequentially. The result of each test is stored as a bit value in a register, for subsequent access. The circuit may be activated by a test device, or by a microcontroller in an assembled disk drive. To minimize costs, the circuit is integral to the circuitry that is conventionally used to read and write information via the magnetic heads. The oscillator that is conventionally used to characterize the read heads of a disk drive is used in a preferred embodiment to control the sequencing of tests through each head. A very low common mode voltage is provided during the testing of each write head, to minimize ESD (electro-static discharge) related problems. In a test mode, each write head is selected after a read head is selected, thereby minimizing the possibility of an accidental corruption of the data when the write head is tested. To avoid a degradation of performance, and in particular a degradation of rise/fall times in the write driver, the circuitry that controls the test voltages and currents is provided substantially up-stream of the write driver.

Magnetic head conductivity testing and form factor determination in a read/write device

A magnetic storage apparatus includes first and second control devices to effectively reduce a disturbance which occurs in a read channel of the apparatus upon transition from a write mode to a read mode. The first control device is in a first gain stage coupled to a read sensor. The second control device is a back-end circuit and, in addition to reducing the duration of the write-to-read disturbance, is effective to significantly reduce offset of the apparatus. A user interface in the form of a serial interface allows user programmability of both of the first and second control devices. The serial interface and the read channel with the first and second control devices are embodied in a pre-amplifier integrated circuit. The programmability affords flexibility to the IC manufacturer as well as to the manufacturer of the magnetic storage device in optimizing the read channel to account for model-to-model and unit-to-unit variations in the write-to-read disturbance.

Magnetic medium storage apparatus with read channel having a programmable write-to-read suppression

A preamplifier integrated circuit for a magnetic storage device includes read channel and a write channel. The read channel includes a filter in a forward signal path which has a low corner frequency (LCF) which varies in a time dependent manner related to the duration of a write-to-read disturbance induced by a transition from a write mode to a read mode. The LCF of the filter moves from a relatively high initial frequency to a lower steady state frequency to effectively reduce the settling time of the write-to-read disturbance without causing read errors which may arise from overfiltering in the steady state. Favorably, the filter in the forward signal path is formed by a unity gain differential emitter-follower in the forward path and a low pass filter (LPF) in a feedback path around the differential emitter-follower, the pole of the LPF being moved to achieved the movement of the LCF in the forward path. In the steady-state read mode, the filter arrangement also significant reduces DC offset in the read channel.

Circuit for reduction and optimization of write-to-read settling times in magnetic medium storage devices

An integrated circuit includes a filter with switched capacitors to dynamically adjust a corner frequency of the filter. Such dynamically adjustable filters are typically included in circuits to reduce noise, and consequently such filters should not themselves generate noise. An equalization circuit is included in the filter to equalize the potential on each terminal of the switched capacitors prior to being switched into circuit, thereby removing a source of transient current. Another source of noise is a transient current induced by the application of control signals to the transistors used to switch the capacitors into circuit. A compensation circuit is included which generates a compensation current of opposite sense and substantially the same magnitude as the induced transient currents, to thereby effectively cancel noise at the filter output.

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Sunnyvale, CA, United States of America

Sanjay Manohar Bhandari