Freescale Semiconductor,inc.

Nxp B.v.

Nxp Usa, Inc.

Freescale

Sanjay Kumar Wadhwa

Kulbhushan Misri

Anand Kumar Sinha

Divya Tripathi

Qadeer Ahmad Khan

Saurabh Goyal

Siddhartha Gk

Krishna Thakur

Anil Kumar Gottapu

Deeya Muhury

Deependra Kumar Jain

Firas Najeh Abughazaleh

Ravi Dixit

Jaideep Banerjee

Vinod K Jain

Devesh P Singh

Avinash Chandra Tripathi

Michael Priel

Amit Kumar Srivastava

Ricardo Pureza Coimbra

Alfredo Olmos

Charles Eric Seaberg

Lavi Koch

Alvin Leng Sun Loke

Fabio Duarte De Martin

Robert Matthew Mertens

Ateet Omer

Neha Goel

Firas N Abughazaleh

Saurabh Srivastava

Manish Kumar Upadhyay

Atul Kumar

Sapna Sharma

Rakesh K Gupta

Avinish Chandra Tripathi

Pawan K Tiwari

Murugesan Raman

One example discloses a power on reset (POR) circuit, including: an input configured to receive a power supply voltage; a delay circuit configured to output a first signal to a set of logic circuits prior to a delay time; wherein the delay circuit is configured to output a second signal to the set of logic circuits after the delay time; wherein the delay circuit includes a voltage drop device coupled to receive the power supply voltage, a switching device having an on-resistance and coupled to the voltage drop device, and a capacitance device having a capacitance and coupled to the switching device; and wherein the on-resistance of the switching device and the capacitance of the capacitance device together are configured to set the delay time.

Power on reset (POR) circuit

An integrated circuit (IC) includes one or more active transistors and multiple series-coupled dummy transistors. The dummy transistors are coupled between two active transistors and/or at the ends of each active transistor. When the dummy transistors are coupled between two active transistors, apart from two conductive regions that are coupled to two active transistors, each remaining conductive region of the dummy transistors is maintained in a floating state to control a leakage current between the two active transistors. Similarly, when the dummy transistors are coupled at an end of one active transistor, apart from one conductive region that is coupled to the active transistor, each remaining conductive region of the dummy transistors is maintained in the floating state to control a leakage current between the active transistor and the dummy transistors.

System for controlling leakage current in integrated circuits

A temperature sensor includes a sensing element and a load. Multiple different currents pass through the sensing element in a sequential manner. Based on each current that passes through the sensing element, the sensing element outputs a complementary-to-absolute-temperature (CTAT) voltage and another current. Further, the currents that pass through the sensing element and the currents that the sensing element output separately pass through the load and result in the generation of multiple load voltages across the load. A current density ratio of the temperature sensor is determined based on the load voltages generated across the load. Further, a temperature value indicative of a temperature sensed by the temperature sensor is generated based on the current density ratio and the CTAT voltages outputted by the sensing element based on the different currents that pass therethrough.

Temperature sensor

A clock generator includes an input coupled to receive an input clock signal from a first clock source, and a noise rejection circuit configured to provide an output clock signal based on the input clock signal. The noise rejection circuit includes an event generator having a digital counter circuit. The event generator is configured to generate a first event signal based on a count value of the digital counter circuit, in which the noise rejection circuit is configured to produce an edge on the output clock signal in response to both the event signal and a state of the input clock signal.

Clock generator with noise rejection circuit

A level shifter includes a control circuit and a bias circuit. The control circuit receives a bias voltage, a first signal associated with a first voltage domain, and supply voltages associated with a second voltage domain, and outputs a second signal that is associated with the second voltage domain. The bias circuit generates the bias voltage that is indicative of the duty cycle of the second signal, and provides the bias voltage to the control circuit to control the duty cycle of the second signal. The duty cycle of the second signal is controlled such that a difference between a duty cycle of the first signal and an inverse of the duty cycle of the second signal is less than a tolerance limit.

Level shifter

A soft-start circuit for a voltage regulator includes a comparator and a delay circuit. The comparator compares an output voltage, that is generated by the voltage regulator, and a reference voltage to generate a comparison signal. Further, the delay circuit receives the reference voltage and a control signal that is outputted based on the comparison signal, and outputs and provides another reference voltage to the voltage regulator. During a start-up of the voltage regulator, the reference voltage outputted by the delay circuit is a delayed version of the reference voltage received by the delay circuit. Thus, the soft-start circuit mitigates an overshoot of the output voltage during the start-up. Further, on completion of the start-up, the reference voltage outputted by the delay circuit is equal to the reference voltage received by the delay circuit.

Soft-start circuit for voltage regulator

A bandgap voltage regulator includes a proportional-to-absolute-temperature (PTAT) circuit, an amplifier, and a driver circuit. The PTAT circuit can include various transistors that output a corresponding control voltage. The amplifier generates another control voltage to compensate base-current variations associated with the transistors of the PTAT circuit. The control voltage is generated by the amplifier based on the control voltage outputted by the PTAT circuit, and one of a base-emitter voltage associated with a transistor of the PTAT circuit, a scaled down version of the control voltage outputted by the amplifier, and a scaled down version of the base-emitter voltage. The driver circuit outputs, based on a supply voltage and the control voltages outputted by the PTAT circuit, a reference voltage for driving a functional circuit.

Bandgap voltage regulator

A level shifter includes a pull-down circuit, a pull-up circuit, a protection circuit, and an output generator. The pull-down circuit is configured to receive input voltages, and generate bias voltages. The input voltages are associated with a voltage domain. The pull-up circuit is configured to receive a supply voltage and generate control voltages. The protection circuit is configured to receive reference voltages, and control the generation of the bias voltages and the control voltages. The output generator is configured to receive at least one of the reference voltages, and at least one of the bias voltages and the control voltages, and generate output voltages that are able to reach minimum and maximum voltage levels of another voltage domain. Further, the output voltages remain unaffected by variations in process, voltage, and temperature.

An integrated circuit includes a base current cancellation circuit and a complementary to absolute temperature (CTAT) circuit. The base current cancellation circuit includes a first bipolar junction transistor (BJT) and a current mirror coupled to the first BJT. The current mirror is configured to provide a mirrored current to a base electrode of the first BJT. The CTAT circuit is coupled to receive a voltage signal corresponding to a reference current of the current mirror. The CTAT circuit includes a second BJT coupled to form a base current based on the voltage signal.

Base current cancellation circuit and method therefor

An integrated circuit includes an output driver circuit configured to provide a first voltage at an output terminal. The output driver circuit includes a transistor having a first current electrode coupled at a voltage supply terminal and a second current electrode coupled at the output terminal, and a resistor having a first terminal coupled at the output terminal and a second terminal coupled at a first node. An amplifier circuit is coupled to the output driver circuit and is configured to generate a proportional to absolute temperature (PTAT) current in a first circuit branch of the output driver circuit coupled at the first node. A complementary to absolute temperature (CTAT) circuit is configured to generate a CTAT current in a second circuit branch coupled at the first node.

Reference voltage generator with regulator system

A low voltage differential signaling circuit includes an output driver circuit configured to provide a differential signal pair based on a first signal and a second signal. A peak detect circuit is coupled to receive the differential signal pair and configured to provide a feedback signal based on the differential signal pair and the first and second signals. An amplifier circuit has a first input coupled to the peak detect circuit, a second input coupled to receive a reference voltage, and an output coupled to provide a bias voltage to the output driver circuit.

Low voltage differential signaling circuit

An on-die temperature sensor measures temperature during a temperature-measurement session. A PTAT (proportional-to-absolute-temperature) generator generates an analog PTAT voltage that is dependent on temperature. A ramp generator generates a changing, analog ramp voltage whose rate of change is dependent on the PTAT voltage, such that the rate of change of the ramp voltage is dependent on the temperature. A comparator compares the ramp voltage to a reference voltage to detect termination of the temperature-measurement session. A counter generates a count value based on the duration of the temperature-measurement session, where the count value is mapped to the measured temperature using a lookup table. The PTAT generator has (i) two npn-type bipolar devices that generate a base-to-emitter voltage difference that is dependent on temperature and function as an amplifier input stage and (ii) circuitry to generate base currents for the bipolar devices to avoid current loading at the PTAT output.

On-die temperature sensor for integrated circuit

A power-on-reset (POR) circuit for a system-on-chip (SOC) includes a biased switching element having a source, drain, and gate, with the source being connected to a supply voltage and the drain and gate being connected to a control line. The POR circuit further includes a first delay switching element having a source connected to a reduced supply voltage, a gate connected to the control line, and a drain, and an inverter having an input and an output, with the input being connected to the drain of the first delay switching element. The inverter includes a first CMOS inverter coupled between the supply voltage and a reference voltage. A first capacitor is coupled between the inverter input and the reference voltage. A second capacitor coupled between the inverter input and an output of the first CMOS inverter.

Low variation power-on-reset circuit

A charge pump includes a charge pump core circuit, a replica bias circuit, and a differential amplifier. The charge pump core circuit includes current source and sink circuits for charging and discharging an output node of the charge pump core circuit. The current source and current sink circuits are user programmable using bit signals to adjust a bandwidth and a phase margin of a phase-locked loop (PLL) that includes the charge pump. An impedance of the replica bias circuit varies based on the bit signals. The differential amplifier and the replica bias circuit form a feedback loop that reduces current mismatch between the current source and sink circuits.

Programmable charge pump

A level shifter that shifts a voltage level of an input signal, where the input signal oscillates between a voltage level of a first supply voltage and ground. The level shifter includes a bias circuit, and first and second transistors. The bias circuit provides a bias voltage to the first transistor based on the first supply voltage. The second transistor is connected in series with the first transistor, and the series combination is connected between voltage supplies that provide second and third supply voltages. The second transistor receives the input signal at its gate, and a level-shifted version of the input signal is output at a node between the first and second transistors. The level-shifted signal oscillates between the voltage levels of the second and third supply voltages.

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Noida, India

Sanjay Kumar Wadhwa